qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] disas/riscv: Further correction to LUI disassembly


From: Richard Henderson
Subject: Re: [PATCH] disas/riscv: Further correction to LUI disassembly
Date: Mon, 7 Aug 2023 15:59:53 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0

On 8/7/23 15:01, Richard Bagley wrote:
I do apologize, but I do not understand your remark at all. Could I trouble you to spell this out.

In:
+                snprintf(tmp, sizeof(tmp), "%d", dec->imm >> 12 & 0xfffff);
0xfffff is a mask which recovers the 20 bit field used to represent the immediate in the instruction encoding.

You seem to be responding to the syntax, which is unrelated to my change.
But I did notice it is the case that both GCC and LLVM disassemblers do not accept signed integer arguments to LUI:
lui r1, -1
but instead require
lui r1, 0xfffff

Your language is confusing. Disassembler or assembler? A disassembler would not "accept" but "output" arguments for LUI.

If the assembler rejects "lui r1, -1", that would be a bug, because the field 
*is* signed.

For the disassembler, the field *is* signed, therefore outputting a signed value is correct. Outputting an unsigned hex value hides the fact that bit 31 is the sign.

To my mind this is exactly the same as emitting a signed value for the 
immediate in ADDI.


r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]