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[PATCH v4 35/48] target/loongarch: Implement xvpcnt
From: |
Song Gao |
Subject: |
[PATCH v4 35/48] target/loongarch: Implement xvpcnt |
Date: |
Wed, 30 Aug 2023 16:48:49 +0800 |
This patch includes:
- VPCNT.{B/H/W/D}.
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
target/loongarch/insns.decode | 5 +++++
target/loongarch/disas.c | 5 +++++
target/loongarch/vec_helper.c | 4 ++--
target/loongarch/insn_trans/trans_lasx.c.inc | 5 +++++
4 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index 3175532045..d683c6a6ab 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -1779,6 +1779,11 @@ xvclz_h 0111 01101001 11000 00101 ..... .....
@vv
xvclz_w 0111 01101001 11000 00110 ..... ..... @vv
xvclz_d 0111 01101001 11000 00111 ..... ..... @vv
+xvpcnt_b 0111 01101001 11000 01000 ..... ..... @vv
+xvpcnt_h 0111 01101001 11000 01001 ..... ..... @vv
+xvpcnt_w 0111 01101001 11000 01010 ..... ..... @vv
+xvpcnt_d 0111 01101001 11000 01011 ..... ..... @vv
+
xvreplgr2vr_b 0111 01101001 11110 00000 ..... ..... @vr
xvreplgr2vr_h 0111 01101001 11110 00001 ..... ..... @vr
xvreplgr2vr_w 0111 01101001 11110 00010 ..... ..... @vr
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index 0fc58735b9..9e31f9bbbc 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -2205,6 +2205,11 @@ INSN_LASX(xvclz_h, vv)
INSN_LASX(xvclz_w, vv)
INSN_LASX(xvclz_d, vv)
+INSN_LASX(xvpcnt_b, vv)
+INSN_LASX(xvpcnt_h, vv)
+INSN_LASX(xvpcnt_w, vv)
+INSN_LASX(xvpcnt_d, vv)
+
INSN_LASX(xvreplgr2vr_b, vr)
INSN_LASX(xvreplgr2vr_h, vr)
INSN_LASX(xvreplgr2vr_w, vr)
diff --git a/target/loongarch/vec_helper.c b/target/loongarch/vec_helper.c
index 789f6b303e..9c2b52fd7d 100644
--- a/target/loongarch/vec_helper.c
+++ b/target/loongarch/vec_helper.c
@@ -2183,9 +2183,9 @@ void HELPER(NAME)(void *vd, void *vj, uint32_t desc) \
int i; \
VReg *Vd = (VReg *)vd; \
VReg *Vj = (VReg *)vj; \
+ int oprsz = simd_oprsz(desc); \
\
- for (i = 0; i < LSX_LEN/BIT; i++) \
- { \
+ for (i = 0; i < oprsz / (BIT / 8); i++) { \
Vd->E(i) = FN(Vj->E(i)); \
} \
}
diff --git a/target/loongarch/insn_trans/trans_lasx.c.inc
b/target/loongarch/insn_trans/trans_lasx.c.inc
index 4227fbe629..2a24de178d 100644
--- a/target/loongarch/insn_trans/trans_lasx.c.inc
+++ b/target/loongarch/insn_trans/trans_lasx.c.inc
@@ -528,6 +528,11 @@ TRANS(xvclz_h, LASX, gen_vv, 32, gen_helper_vclz_h)
TRANS(xvclz_w, LASX, gen_vv, 32, gen_helper_vclz_w)
TRANS(xvclz_d, LASX, gen_vv, 32, gen_helper_vclz_d)
+TRANS(xvpcnt_b, LASX, gen_vv, 32, gen_helper_vpcnt_b)
+TRANS(xvpcnt_h, LASX, gen_vv, 32, gen_helper_vpcnt_h)
+TRANS(xvpcnt_w, LASX, gen_vv, 32, gen_helper_vpcnt_w)
+TRANS(xvpcnt_d, LASX, gen_vv, 32, gen_helper_vpcnt_d)
+
TRANS(xvreplgr2vr_b, LASX, gvec_dup, 32, MO_8)
TRANS(xvreplgr2vr_h, LASX, gvec_dup, 32, MO_16)
TRANS(xvreplgr2vr_w, LASX, gvec_dup, 32, MO_32)
--
2.39.1
- [PATCH v4 26/48] target/loongarch: Implement LASX logic instructions, (continued)
- [PATCH v4 26/48] target/loongarch: Implement LASX logic instructions, Song Gao, 2023/08/30
- [PATCH v4 23/48] target/loongarch: Implement xvsigncov, Song Gao, 2023/08/30
- [PATCH v4 27/48] target/loongarch: Implement xvsll xvsrl xvsra xvrotr, Song Gao, 2023/08/30
- [PATCH v4 31/48] target/loongarch: Implement xvsrlrn xvsrarn, Song Gao, 2023/08/30
- [PATCH v4 30/48] target/loongarch: Implement xvsrln xvsran, Song Gao, 2023/08/30
- [PATCH v4 36/48] target/loongarch: Implement xvbitclr xvbitset xvbitrev, Song Gao, 2023/08/30
- [PATCH v4 35/48] target/loongarch: Implement xvpcnt,
Song Gao <=
- [PATCH v4 33/48] target/loongarch: Implement xvssrlrn xvssrarn, Song Gao, 2023/08/30
- [PATCH v4 34/48] target/loongarch: Implement xvclo xvclz, Song Gao, 2023/08/30
- [PATCH v4 38/48] target/loongarch: Implement LASX fpu arith instructions, Song Gao, 2023/08/30
- [PATCH v4 42/48] target/loongarch: Implement xvbitsel xvset, Song Gao, 2023/08/30
- [PATCH v4 39/48] target/loongarch: Implement LASX fpu fcvt instructions, Song Gao, 2023/08/30