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[PATCH v2 09/14] tcg/loongarch64: Lower vector saturated ops
From: |
Jiajie Chen |
Subject: |
[PATCH v2 09/14] tcg/loongarch64: Lower vector saturated ops |
Date: |
Fri, 1 Sep 2023 17:31:02 +0800 |
Lower the following ops:
- ssadd_vec
- usadd_vec
- sssub_vec
- ussub_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 32 ++++++++++++++++++++++++++++++++
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index ad1fbf0339..1e587a82b1 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1671,6 +1671,18 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
static const LoongArchInsn umax_vec_insn[4] = {
OPC_VMAX_BU, OPC_VMAX_HU, OPC_VMAX_WU, OPC_VMAX_DU
};
+ static const LoongArchInsn ssadd_vec_insn[4] = {
+ OPC_VSADD_B, OPC_VSADD_H, OPC_VSADD_W, OPC_VSADD_D
+ };
+ static const LoongArchInsn usadd_vec_insn[4] = {
+ OPC_VSADD_BU, OPC_VSADD_HU, OPC_VSADD_WU, OPC_VSADD_DU
+ };
+ static const LoongArchInsn sssub_vec_insn[4] = {
+ OPC_VSSUB_B, OPC_VSSUB_H, OPC_VSSUB_W, OPC_VSSUB_D
+ };
+ static const LoongArchInsn ussub_vec_insn[4] = {
+ OPC_VSSUB_BU, OPC_VSSUB_HU, OPC_VSSUB_WU, OPC_VSSUB_DU
+ };
a0 = args[0];
a1 = args[1];
@@ -1821,6 +1833,18 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_umax_vec:
tcg_out32(s, encode_vdvjvk_insn(umax_vec_insn[vece], a0, a1, a2));
break;
+ case INDEX_op_ssadd_vec:
+ tcg_out32(s, encode_vdvjvk_insn(ssadd_vec_insn[vece], a0, a1, a2));
+ break;
+ case INDEX_op_usadd_vec:
+ tcg_out32(s, encode_vdvjvk_insn(usadd_vec_insn[vece], a0, a1, a2));
+ break;
+ case INDEX_op_sssub_vec:
+ tcg_out32(s, encode_vdvjvk_insn(sssub_vec_insn[vece], a0, a1, a2));
+ break;
+ case INDEX_op_ussub_vec:
+ tcg_out32(s, encode_vdvjvk_insn(ussub_vec_insn[vece], a0, a1, a2));
+ break;
case INDEX_op_dupm_vec:
tcg_out_dupm_vec(s, type, vece, a0, a1, a2);
break;
@@ -1852,6 +1876,10 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type,
unsigned vece)
case INDEX_op_smax_vec:
case INDEX_op_umin_vec:
case INDEX_op_umax_vec:
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_sssub_vec:
+ case INDEX_op_ussub_vec:
return 1;
default:
return 0;
@@ -2031,6 +2059,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
case INDEX_op_smax_vec:
case INDEX_op_umin_vec:
case INDEX_op_umax_vec:
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_sssub_vec:
+ case INDEX_op_ussub_vec:
return C_O1_I2(w, w, w);
case INDEX_op_not_vec:
diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h
index 2b81a06c89..72bfd0d440 100644
--- a/tcg/loongarch64/tcg-target.h
+++ b/tcg/loongarch64/tcg-target.h
@@ -190,7 +190,7 @@ extern bool use_lsx_instructions;
#define TCG_TARGET_HAS_roti_vec 0
#define TCG_TARGET_HAS_rots_vec 0
#define TCG_TARGET_HAS_rotv_vec 0
-#define TCG_TARGET_HAS_sat_vec 0
+#define TCG_TARGET_HAS_sat_vec 1
#define TCG_TARGET_HAS_minmax_vec 1
#define TCG_TARGET_HAS_bitsel_vec 0
#define TCG_TARGET_HAS_cmpsel_vec 0
--
2.42.0
- Re: [PATCH v2 03/14] tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt, (continued)
- [PATCH v2 04/14] tcg/loongarch64: Lower add/sub_vec to vadd/vsub, Jiajie Chen, 2023/09/01
- [PATCH v2 02/14] tcg/loongarch64: Lower basic tcg vec ops to LSX, Jiajie Chen, 2023/09/01
- [PATCH v2 05/14] tcg/loongarch64: Lower vector bitwise operations, Jiajie Chen, 2023/09/01
- [PATCH v2 06/14] tcg/loongarch64: Lower neg_vec to vneg, Jiajie Chen, 2023/09/01
- [PATCH v2 07/14] tcg/loongarch64: Lower mul_vec to vmul, Jiajie Chen, 2023/09/01
- [PATCH v2 08/14] tcg/loongarch64: Lower vector min max ops, Jiajie Chen, 2023/09/01
- [PATCH v2 09/14] tcg/loongarch64: Lower vector saturated ops,
Jiajie Chen <=
- [PATCH v2 10/14] tcg/loongarch64: Lower vector shift vector ops, Jiajie Chen, 2023/09/01
- [PATCH v2 01/14] tcg/loongarch64: Import LSX instructions, Jiajie Chen, 2023/09/01
- [PATCH v2 11/14] tcg/loongarch64: Lower bitsel_vec to vbitsel, Jiajie Chen, 2023/09/01
- [PATCH v2 13/14] tcg/loongarch64: Lower rotv_vec ops to LSX, Jiajie Chen, 2023/09/01
- [PATCH v2 12/14] tcg/loongarch64: Lower vector shift integer ops, Jiajie Chen, 2023/09/01
- [PATCH v2 14/14] tcg/loongarch64: Lower rotli_vec to vrotri, Jiajie Chen, 2023/09/01