[PATCH v2] hw/loongarch: Add virtio-mmio bus support

[Tianrui Zhao]

Add virtio-mmio bus support for LoongArch, so that devices
could be added in the virtio-mmio bus. And add it's address
info and interrupt number into fdt and dsdt.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
---
 hw/loongarch/Kconfig       |  1 +
 hw/loongarch/acpi-build.c  | 20 ++++++++++++++++++++
 hw/loongarch/virt.c        | 22 ++++++++++++++++++++++
 include/hw/pci-host/ls7a.h |  3 +++
 4 files changed, 46 insertions(+)

diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index 1e7c5b43c5..01ab8ce8e7 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -22,3 +22,4 @@ config LOONGARCH_VIRT
     select DIMM
     select PFLASH_CFI01
     select ACPI_HMAT
+    select VIRTIO_MMIO
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index ae292fc543..304bfe3958 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -363,6 +363,25 @@ static void acpi_dsdt_add_tpm(Aml *scope, 
LoongArchMachineState *vms)
 }
 #endif
 
+static void acpi_dsdt_add_virtio(Aml *scope)
+{
+    uint32_t irq = VIRT_VIRTIO_MMIO_IRQ;
+    hwaddr base = VIRT_VIRTIO_MMIO_BASE;
+    hwaddr size = VIRT_VIRTIO_MMIO_SIZE;
+    Aml *dev = aml_device("VR%02u", 0);
+
+    aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005")));
+    aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+    aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
+
+    Aml *crs = aml_resource_template();
+    aml_append(crs, aml_memory32_fixed(base, size, AML_READ_WRITE));
+    aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
+               AML_EXCLUSIVE, &irq, 1));
+    aml_append(dev, aml_name_decl("_CRS", crs));
+    aml_append(scope, dev);
+}
+
 /* build DSDT */
 static void
 build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
@@ -381,6 +400,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, 
MachineState *machine)
 #ifdef CONFIG_TPM
     acpi_dsdt_add_tpm(dsdt, lams);
 #endif
+    acpi_dsdt_add_virtio(dsdt);
     /* System State Package */
     scope = aml_scope("\\");
     pkg = aml_package(4);
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 2629128aed..4732a1bc21 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -116,6 +116,22 @@ static void fdt_add_rtc_node(LoongArchMachineState *lams)
     g_free(nodename);
 }
 
+static void fdt_add_virtio_mmio_node(LoongArchMachineState *lams)
+{
+    char *nodename;
+    hwaddr base = VIRT_VIRTIO_MMIO_BASE;
+    hwaddr size = VIRT_VIRTIO_MMIO_SIZE;
+    MachineState *ms = MACHINE(lams);
+
+    nodename = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
+    qemu_fdt_add_subnode(ms->fdt, nodename);
+    qemu_fdt_setprop_string(ms->fdt, nodename,
+                            "compatible", "virtio,mmio");
+    qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
+                                 2, base, 2, size);
+    g_free(nodename);
+}
+
 static void fdt_add_uart_node(LoongArchMachineState *lams)
 {
     char *nodename;
@@ -560,6 +576,12 @@ static void loongarch_devices_init(DeviceState *pch_pic, 
LoongArchMachineState *
                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
     fdt_add_rtc_node(lams);
 
+    /* virtio-mmio device */
+    sysbus_create_simple("virtio-mmio", VIRT_VIRTIO_MMIO_BASE,
+                         qdev_get_gpio_in(pch_pic,
+                         VIRT_VIRTIO_MMIO_IRQ - VIRT_GSI_BASE));
+    fdt_add_virtio_mmio_node(lams);
+
     pm_mem = g_new(MemoryRegion, 1);
     memory_region_init_io(pm_mem, NULL, &loongarch_virt_pm_ops,
                           NULL, "loongarch_virt_pm", PM_SIZE);
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index e753449593..38bcc41dee 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -42,6 +42,9 @@
 #define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
 #define VIRT_RTC_LEN             0x100
 #define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 4)
+#define VIRT_VIRTIO_MMIO_IRQ     (VIRT_GSI_BASE + 7)
+#define VIRT_VIRTIO_MMIO_BASE    0x1e200000
+#define VIRT_VIRTIO_MMIO_SIZE    0x200
 
 #define VIRT_PLATFORM_BUS_BASEADDRESS   0x16000000
 #define VIRT_PLATFORM_BUS_SIZE          0x2000000
-- 
2.39.1