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[PATCH 10/18] target/i386: reintroduce debugging mechanism
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From: |
Paolo Bonzini |
|
Subject: |
[PATCH 10/18] target/i386: reintroduce debugging mechanism |
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Date: |
Sat, 14 Oct 2023 12:01:12 +0200 |
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/decode-new.c.inc | 5 ++++-
target/i386/tcg/translate.c | 27 +++++++++++++++++++++++++++
2 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 01c46e6a789..fb95e0b9268 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -1701,6 +1701,9 @@ static void disas_insn_new(DisasContext *s, CPUState
*cpu, int b)
X86DecodedInsn decode;
X86DecodeFunc decode_func = decode_root;
+#ifdef CONFIG_USER_ONLY
+ if (limit) { --limit; }
+#endif
s->has_modrm = false;
next_byte:
@@ -1987,7 +1990,7 @@ static void disas_insn_new(DisasContext *s, CPUState
*cpu, int b)
tcg_gen_mov_tl(cpu_cc_src, decode.cc_src);
}
if (decode.cc_src2) {
- tcg_gen_mov_tl(cpu_cc_src, decode.cc_src2);
+ tcg_gen_mov_tl(cpu_cc_src2, decode.cc_src2);
}
if (decode.cc_srcT) {
tcg_gen_mov_tl(s->cc_srcT, decode.cc_srcT);
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 39b5752e780..080b56840da 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -2980,6 +2980,9 @@ static void gen_sty_env_A0(DisasContext *s, int offset,
bool align)
tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ);
}
+static bool first = true;
+static unsigned long limit;
+
#include "decode-new.h"
#include "emit.c.inc"
#include "decode-new.c.inc"
@@ -3134,15 +3137,39 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
prefixes = 0;
+ if (first) {
+ const char *env = getenv("QEMU_I386_LIMIT");
+ limit = env ? atol(env) : -1;
+ first = false;
+ }
+ bool use_new = true;
+#ifdef CONFIG_USER_ONLY
+ use_new &= limit > 0;
+#endif
+
next_byte:
s->prefix = prefixes;
b = x86_ldub_code(env, s);
/* Collect prefixes. */
switch (b) {
default:
+#ifndef CONFIG_USER_ONLY
+ use_new &= b <= limit;
+#endif
+ if (use_new && 0) {
+ disas_insn_new(s, cpu, b);
+ return true;
+ }
break;
case 0x0f:
b = x86_ldub_code(env, s) + 0x100;
+#ifndef CONFIG_USER_ONLY
+ use_new &= b <= limit;
+#endif
+ if (use_new && 0) {
+ disas_insn_new(s, cpu, b);
+ return true;
+ }
break;
case 0xf3:
prefixes |= PREFIX_REPZ;
--
2.41.0
- Re: [PATCH 02/18] target/i386: validate VEX.W for AVX instructions, (continued)
- [PATCH 05/18] tests/tcg/i386: test-avx: add test cases for SHA new instructions, Paolo Bonzini, 2023/10/14
- [PATCH 04/18] tests/tcg/i386: initialize more registers in test-avx, Paolo Bonzini, 2023/10/14
- [PATCH 06/18] target/i386: accept full MemOp in gen_ext_tl, Paolo Bonzini, 2023/10/14
- [PATCH 09/18] target/i386: do not clobber A0 in POP translation, Paolo Bonzini, 2023/10/14
- [PATCH 03/18] target/i386: implement SHA instructions, Paolo Bonzini, 2023/10/14
- [PATCH 10/18] target/i386: reintroduce debugging mechanism,
Paolo Bonzini <=
- [PATCH 12/18] target/i386: adjust decoding of J operand, Paolo Bonzini, 2023/10/14
- [PATCH 13/18] target/i386: split eflags computation out of gen_compute_eflags, Paolo Bonzini, 2023/10/14
- [PATCH 07/18] target/i386: introduce flags writeback mechanism, Paolo Bonzini, 2023/10/14
- [PATCH 08/18] target/i386: implement CMPccXADD, Paolo Bonzini, 2023/10/14
- [PATCH 14/18] target/i386: move 60-BF opcodes to new decoder, Paolo Bonzini, 2023/10/14