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[PATCH v4 0/5] gdbstub and TCG plugin improvements
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From: |
Akihiko Odaki |
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Subject: |
[PATCH v4 0/5] gdbstub and TCG plugin improvements |
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Date: |
Wed, 18 Oct 2023 03:53:55 +0900 |
This series extracts fixes and refactorings that can be applied
independently from "[PATCH v9 00/23] plugins: Allow to read registers".
The patch "target/riscv: Move MISA limits to class" was replaced with
patch "target/riscv: Move misa_mxl_max to class" since I found instances
may have different misa_ext_mask.
V3 -> V4:
Added patch "gdbstub: Check if gdb_regs is NULL".
V2 -> V3:
Restored patch sets from the previous version.
Rebased to commit 800485762e6564e04e2ab315132d477069562d91.
V1 -> V2:
Added patch "target/riscv: Do not allow MXL_RV32 for TARGET_RISCV64".
Added patch "target/riscv: Initialize gdb_core_xml_file only once".
Dropped patch "target/riscv: Remove misa_mxl validation".
Dropped patch "target/riscv: Move misa_mxl_max to class".
Dropped patch "target/riscv: Validate misa_mxl_max only once".
Akihiko Odaki (5):
gdbstub: Check if gdb_regs is NULL
target/riscv: Remove misa_mxl validation
target/riscv: Move misa_mxl_max to class
target/riscv: Validate misa_mxl_max only once
plugins: Remove an extra parameter
target/riscv/cpu-qom.h | 1 +
target/riscv/cpu.h | 3 +-
accel/tcg/plugin-gen.c | 9 +--
gdbstub/gdbstub.c | 34 +++++----
hw/riscv/boot.c | 2 +-
target/riscv/cpu.c | 139 ++++++++++++++++++++++---------------
target/riscv/gdbstub.c | 12 ++--
target/riscv/kvm/kvm-cpu.c | 10 +--
target/riscv/machine.c | 7 +-
target/riscv/tcg/tcg-cpu.c | 42 ++---------
target/riscv/translate.c | 3 +-
11 files changed, 131 insertions(+), 131 deletions(-)
--
2.42.0
- [PATCH v4 0/5] gdbstub and TCG plugin improvements,
Akihiko Odaki <=