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[PULL v2 45/78] hw/i386/pc_q35: Wire ICH9 LPC function's interrupts befo
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From: |
Michael S. Tsirkin |
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Subject: |
[PULL v2 45/78] hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize() |
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Date: |
Thu, 19 Oct 2023 14:23:11 -0400 |
From: Bernhard Beschow <shentey@gmail.com>
When the board assigns the ISA IRQs after the device's realize(), internal
devices such as the RTC can't be wired in ich9_lpc_realize() since the qemu_irqs
are still NULL. Fix that by assigning the ISA interrupts before realize().
This change is necessary for PIIX consolidation because PIIX4 wires the RTC
interrupts in its realize() method, so PIIX3 needs to do so as well. Since the
PC and Q35 boards share RTC code, and since PIIX3 needs the change, ICH9 needs
to be adapted as well.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-9-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/pc_q35.c | 14 +++++++-------
hw/isa/lpc_ich9.c | 6 +++---
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index a7386f2ca2..597943ff1b 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -242,11 +242,18 @@ static void pc_q35_init(MachineState *machine)
host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0"));
pcms->bus = host_bus;
+ /* irq lines */
+ gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
+
/* create ISA bus */
lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC),
TYPE_ICH9_LPC_DEVICE);
qdev_prop_set_bit(DEVICE(lpc), "smm-enabled",
x86_machine_is_smm_enabled(x86ms));
+ lpc_dev = DEVICE(lpc);
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
+ qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
+ }
pci_realize_and_unref(lpc, host_bus, &error_fatal);
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc"));
@@ -273,13 +280,6 @@ static void pc_q35_init(MachineState *machine)
"true", true);
}
- /* irq lines */
- gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
-
- lpc_dev = DEVICE(lpc);
- for (i = 0; i < IOAPIC_NUM_PINS; i++) {
- qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
- }
isa_bus = ISA_BUS(qdev_get_child_bus(lpc_dev, "isa.0"));
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 3f59980aa0..3fcefc5a8a 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -675,6 +675,9 @@ static void ich9_lpc_initfn(Object *obj)
object_initialize_child(obj, "rtc", &lpc->rtc, TYPE_MC146818_RTC);
+ qdev_init_gpio_out_named(DEVICE(lpc), lpc->gsi, ICH9_GPIO_GSI,
+ IOAPIC_NUM_PINS);
+
object_property_add_uint8_ptr(obj, ACPI_PM_PROP_SCI_INT,
&lpc->sci_gsi, OBJ_PROP_FLAG_READ);
object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_ENABLE_CMD,
@@ -691,7 +694,6 @@ static void ich9_lpc_initfn(Object *obj)
static void ich9_lpc_realize(PCIDevice *d, Error **errp)
{
ICH9LPCState *lpc = ICH9_LPC_DEVICE(d);
- DeviceState *dev = DEVICE(d);
PCIBus *pci_bus = pci_get_bus(d);
ISABus *isa_bus;
@@ -734,8 +736,6 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp)
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
1);
- qdev_init_gpio_out_named(dev, lpc->gsi, ICH9_GPIO_GSI, IOAPIC_NUM_PINS);
-
isa_bus_register_input_irqs(isa_bus, lpc->gsi);
i8257_dma_init(isa_bus, 0);
--
MST
- [PULL v2 12/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 core count test, (continued)
- [PULL v2 12/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 core count test, Michael S. Tsirkin, 2023/10/19
- [PULL v2 19/78] tests: bios-tables-test: Add test for smbios type4 thread count, Michael S. Tsirkin, 2023/10/19
- [PULL v2 16/78] tests: bios-tables-test: Extend smbios core count2 test to cover general topology, Michael S. Tsirkin, 2023/10/19
- [PULL v2 21/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 thread count2 test, Michael S. Tsirkin, 2023/10/19
- [PULL v2 09/78] tests: bios-tables-test: Prepare the ACPI table change for smbios type4 count test, Michael S. Tsirkin, 2023/10/19
- [PULL v2 28/78] vhost-user: hoist "write_sync", "get_features", "get_u64", Michael S. Tsirkin, 2023/10/19
- [PULL v2 33/78] vhost-backend: remove vhost_kernel_reset_device(), Michael S. Tsirkin, 2023/10/19
- [PULL v2 20/78] tests: bios-tables-test: Add ACPI table binaries for smbios type4 thread count test, Michael S. Tsirkin, 2023/10/19
- [PULL v2 25/78] vhost-user: tighten "reply_supported" scope in "set_vring_addr", Michael S. Tsirkin, 2023/10/19
- [PULL v2 27/78] vhost-user: flatten "enforce_reply" into "vhost_user_write_sync", Michael S. Tsirkin, 2023/10/19
- [PULL v2 45/78] hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize(),
Michael S. Tsirkin <=
- [PULL v2 48/78] hw/isa/piix3: Create IDE controller in host device, Michael S. Tsirkin, 2023/10/19
- [PULL v2 52/78] hw/isa/piix4: Remove unused inbound ISA interrupt lines, Michael S. Tsirkin, 2023/10/19
- [PULL v2 30/78] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously, Michael S. Tsirkin, 2023/10/19
- [PULL v2 36/78] timer/i8254: Fix one shot PIT mode, Michael S. Tsirkin, 2023/10/19
- [PULL v2 31/78] memory: initialize 'fv' in MemoryRegionCache to make Coverity happy, Michael S. Tsirkin, 2023/10/19
- [PULL v2 50/78] hw/isa/piix3: Create power management controller in host device, Michael S. Tsirkin, 2023/10/19
- [PULL v2 34/78] virtio: call ->vhost_reset_device() during reset, Michael S. Tsirkin, 2023/10/19
- [PULL v2 38/78] hw/i386/pc: Merge two if statements into one, Michael S. Tsirkin, 2023/10/19
- [PULL v2 41/78] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS, Michael S. Tsirkin, 2023/10/19
- [PULL v2 22/78] tests: bios-tables-test: Add test for smbios type4 thread count2, Michael S. Tsirkin, 2023/10/19