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[PATCH v2 38/65] target/hppa: Decode ADDB double-word
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From: |
Richard Henderson |
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Subject: |
[PATCH v2 38/65] target/hppa: Decode ADDB double-word |
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Date: |
Fri, 20 Oct 2023 13:43:04 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/translate.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index bb55718a4d..21f2819d12 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -3122,6 +3122,17 @@ static bool do_addb(DisasContext *ctx, unsigned r,
TCGv_reg in1,
DisasCond cond;
bool d = false;
+ /*
+ * For hppa64, the ADDB conditions change, dropping ZNV, SV, OD
+ * in favor of double-word EQ, LT, LE.
+ */
+ if (ctx->is_pa20) {
+ d = c >= 5;
+ if (d) {
+ c &= 3;
+ }
+ }
+
in2 = load_gpr(ctx, r);
dest = tcg_temp_new();
sv = NULL;
--
2.34.1
- [PATCH v2 29/65] target/hppa: Remove TARGET_HPPA64, (continued)
- [PATCH v2 29/65] target/hppa: Remove TARGET_HPPA64, Richard Henderson, 2023/10/20
- [PATCH v2 06/65] target/hppa: Fix hppa64 case in machine.c, Richard Henderson, 2023/10/20
- [PATCH v2 05/65] target/hppa: Remove load_const, Richard Henderson, 2023/10/20
- [PATCH v2 11/65] target/hppa: Fix bb_sar for hppa64, Richard Henderson, 2023/10/20
- [PATCH v2 14/65] target/hppa: Make HPPA_BTLB_ENTRIES variable, Richard Henderson, 2023/10/20
- [PATCH v2 13/65] target/hppa: Introduce TYPE_HPPA64_CPU, Richard Henderson, 2023/10/20
- [PATCH v2 31/65] target/hppa: Decode d for unit instructions, Richard Henderson, 2023/10/20
- [PATCH v2 32/65] target/hppa: Decode d for cmpclr instructions, Richard Henderson, 2023/10/20
- [PATCH v2 16/65] target/hppa: Implement hppa_cpu_class_by_name, Richard Henderson, 2023/10/20
- [PATCH v2 39/65] target/hppa: Implement LDD, LDCD, LDDA, STD, STDA, Richard Henderson, 2023/10/20
- [PATCH v2 38/65] target/hppa: Decode ADDB double-word,
Richard Henderson <=
- [PATCH v2 20/65] target/hppa: Fix hppa64 addressing, Richard Henderson, 2023/10/20
- [PATCH v2 21/65] target/hppa: sar register allows only 5 bits on 32-bit CPU, Richard Henderson, 2023/10/20
- [PATCH v2 23/65] target/hppa: Pass d to do_sub_cond, Richard Henderson, 2023/10/20
- [PATCH v2 35/65] target/hppa: Decode d for bb instructions, Richard Henderson, 2023/10/20
- [PATCH v2 37/65] target/hppa: Decode CMPIB double-word, Richard Henderson, 2023/10/20
- [PATCH v2 26/65] target/hppa: Pass d to do_unit_cond, Richard Henderson, 2023/10/20
- [PATCH v2 24/65] target/hppa: Pass d to do_log_cond, Richard Henderson, 2023/10/20
- [PATCH v2 22/65] target/hppa: Pass d to do_cond, Richard Henderson, 2023/10/20
- [PATCH v2 34/65] target/hppa: Decode d for sub instructions, Richard Henderson, 2023/10/20
- [PATCH v2 36/65] target/hppa: Decode d for cmpb instructions, Richard Henderson, 2023/10/20