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[PULL v3 47/62] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in P
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From: |
Michael S. Tsirkin |
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Subject: |
[PULL v3 47/62] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4 |
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Date: |
Sun, 22 Oct 2023 05:25:09 -0400 |
From: Bernhard Beschow <shentey@gmail.com>
Speeds up PIIX4 which resolves an old TODO. Also makes PIIX4 compatible with Xen
which relies on pci_bus_fire_intx_routing_notifier() to be fired.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-27-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/isa/piix.c | 27 +++------------------------
1 file changed, 3 insertions(+), 24 deletions(-)
diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index 449c1baaab..17677c2126 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -81,27 +81,6 @@ static void piix_set_pci_irq(void *opaque, int pirq, int
level)
piix_set_pci_irq_level(s, pirq, level);
}
-static void piix4_set_irq(void *opaque, int irq_num, int level)
-{
- int i, pic_irq, pic_level;
- PIIXState *s = opaque;
- PCIBus *bus = pci_get_bus(&s->dev);
-
- /* now we change the pic irq level according to the piix irq mappings */
- /* XXX: optimize */
- pic_irq = s->dev.config[PIIX_PIRQCA + irq_num];
- if (pic_irq < ISA_NUM_IRQS) {
- /* The pic level is the logical OR of all the PCI irqs mapped to it. */
- pic_level = 0;
- for (i = 0; i < PIIX_NUM_PIRQS; i++) {
- if (pic_irq == s->dev.config[PIIX_PIRQCA + i]) {
- pic_level |= pci_bus_get_irq_level(bus, i);
- }
- }
- qemu_set_irq(s->isa_irqs_in[pic_irq], pic_level);
- }
-}
-
static void piix_request_i8259_irq(void *opaque, int irq, int level)
{
PIIXState *s = opaque;
@@ -223,7 +202,7 @@ static int piix4_post_load(void *opaque, int version_id)
s->rcr = 0;
}
- return 0;
+ return piix_post_load(opaque, version_id);
}
static int piix3_pre_save(void *opaque)
@@ -442,6 +421,7 @@ static void pci_piix_class_init(ObjectClass *klass, void
*data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
+ k->config_write = piix_write_config;
dc->reset = piix_reset;
dc->desc = "ISA bridge";
dc->hotpluggable = false;
@@ -497,7 +477,6 @@ static void piix3_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->config_write = piix_write_config;
k->realize = piix3_realize;
/* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
@@ -522,7 +501,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
return;
}
- pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS);
+ pci_bus_irqs(pci_bus, piix_set_pci_irq, s, PIIX_NUM_PIRQS);
}
static void piix4_init(Object *obj)
--
MST
- [PULL v3 37/62] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in", (continued)
- [PULL v3 37/62] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in", Michael S. Tsirkin, 2023/10/22
- [PULL v3 40/62] hw/isa/piix3: Merge hw/isa/piix4.c, Michael S. Tsirkin, 2023/10/22
- [PULL v3 41/62] hw/isa/piix: Allow for optional PIC creation in PIIX3, Michael S. Tsirkin, 2023/10/22
- [PULL v3 38/62] hw/isa/piix4: Rename reset control operations to match PIIX3, Michael S. Tsirkin, 2023/10/22
- [PULL v3 39/62] hw/isa/piix4: Reuse struct PIIXState from PIIX3, Michael S. Tsirkin, 2023/10/22
- [PULL v3 42/62] hw/isa/piix: Allow for optional PIT creation in PIIX3, Michael S. Tsirkin, 2023/10/22
- [PULL v3 43/62] hw/isa/piix: Harmonize names of reset control memory regions, Michael S. Tsirkin, 2023/10/22
- [PULL v3 44/62] hw/isa/piix: Share PIIX3's base class with PIIX4, Michael S. Tsirkin, 2023/10/22
- [PULL v3 45/62] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4, Michael S. Tsirkin, 2023/10/22
- [PULL v3 46/62] hw/isa/piix: Rename functions to be shared for PCI interrupt triggering, Michael S. Tsirkin, 2023/10/22
- [PULL v3 47/62] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4,
Michael S. Tsirkin <=
- [PULL v3 50/62] hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine, Michael S. Tsirkin, 2023/10/22
- [PULL v3 48/62] hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring, Michael S. Tsirkin, 2023/10/22
- [PULL v3 51/62] vhost-user-common: send get_inflight_fd once, Michael S. Tsirkin, 2023/10/22
- [PULL v3 49/62] hw/isa/piix: Implement multi-process QEMU support also for PIIX4, Michael S. Tsirkin, 2023/10/22
- [PULL v3 53/62] vhost-user-scsi: support reconnect to backend, Michael S. Tsirkin, 2023/10/22
- [PULL v3 52/62] vhost: move and rename the conn retry times, Michael S. Tsirkin, 2023/10/22
- [PULL v3 54/62] vhost-user-scsi: start vhost when guest kicks, Michael S. Tsirkin, 2023/10/22
- [PULL v3 55/62] vhost-user: fix lost reconnect, Michael S. Tsirkin, 2023/10/22
- [PULL v3 56/62] hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range, Michael S. Tsirkin, 2023/10/22
- [PULL v3 57/62] tests/acpi: Allow update of DSDT.cxl, Michael S. Tsirkin, 2023/10/22