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[PULL 07/94] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties
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From: |
Richard Henderson |
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Subject: |
[PULL 07/94] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties |
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Date: |
Wed, 25 Oct 2023 17:13:52 -0700 |
Use symbols not integer constants for the bit positions.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/cpu.c | 72 ++++++++++++++++++++++++++++------------------
1 file changed, 44 insertions(+), 28 deletions(-)
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 8ba96ae225..330b7bead3 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -545,21 +545,22 @@ static const sparc_def_t sparc_defs[] = {
#endif
};
+/* This must match sparc_cpu_properties[]. */
static const char * const feature_name[] = {
- "float",
- "float128",
- "swap",
- "mul",
- "div",
- "flush",
- "fsqrt",
- "fmul",
- "vis1",
- "vis2",
- "fsmuld",
- "hypv",
- "cmt",
- "gl",
+ [CPU_FEATURE_BIT_FLOAT] = "float",
+ [CPU_FEATURE_BIT_FLOAT128] = "float128",
+ [CPU_FEATURE_BIT_SWAP] = "swap",
+ [CPU_FEATURE_BIT_MUL] = "mul",
+ [CPU_FEATURE_BIT_DIV] = "div",
+ [CPU_FEATURE_BIT_FLUSH] = "flush",
+ [CPU_FEATURE_BIT_FSQRT] = "fsqrt",
+ [CPU_FEATURE_BIT_FMUL] = "fmul",
+ [CPU_FEATURE_BIT_VIS1] = "vis1",
+ [CPU_FEATURE_BIT_VIS2] = "vis2",
+ [CPU_FEATURE_BIT_FSMULD] = "fsmuld",
+ [CPU_FEATURE_BIT_HYPV] = "hypv",
+ [CPU_FEATURE_BIT_CMT] = "cmt",
+ [CPU_FEATURE_BIT_GL] = "gl",
};
static void print_features(uint32_t features, const char *prefix)
@@ -835,21 +836,36 @@ static PropertyInfo qdev_prop_nwindows = {
.set = sparc_set_nwindows,
};
+/* This must match feature_name[]. */
static Property sparc_cpu_properties[] = {
- DEFINE_PROP_BIT("float", SPARCCPU, env.def.features, 0, false),
- DEFINE_PROP_BIT("float128", SPARCCPU, env.def.features, 1, false),
- DEFINE_PROP_BIT("swap", SPARCCPU, env.def.features, 2, false),
- DEFINE_PROP_BIT("mul", SPARCCPU, env.def.features, 3, false),
- DEFINE_PROP_BIT("div", SPARCCPU, env.def.features, 4, false),
- DEFINE_PROP_BIT("flush", SPARCCPU, env.def.features, 5, false),
- DEFINE_PROP_BIT("fsqrt", SPARCCPU, env.def.features, 6, false),
- DEFINE_PROP_BIT("fmul", SPARCCPU, env.def.features, 7, false),
- DEFINE_PROP_BIT("vis1", SPARCCPU, env.def.features, 8, false),
- DEFINE_PROP_BIT("vis2", SPARCCPU, env.def.features, 9, false),
- DEFINE_PROP_BIT("fsmuld", SPARCCPU, env.def.features, 10, false),
- DEFINE_PROP_BIT("hypv", SPARCCPU, env.def.features, 11, false),
- DEFINE_PROP_BIT("cmt", SPARCCPU, env.def.features, 12, false),
- DEFINE_PROP_BIT("gl", SPARCCPU, env.def.features, 13, false),
+ DEFINE_PROP_BIT("float", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_FLOAT, false),
+ DEFINE_PROP_BIT("float128", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_FLOAT128, false),
+ DEFINE_PROP_BIT("swap", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_SWAP, false),
+ DEFINE_PROP_BIT("mul", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_MUL, false),
+ DEFINE_PROP_BIT("div", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_DIV, false),
+ DEFINE_PROP_BIT("flush", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_FLUSH, false),
+ DEFINE_PROP_BIT("fsqrt", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_FSQRT, false),
+ DEFINE_PROP_BIT("fmul", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_FMUL, false),
+ DEFINE_PROP_BIT("vis1", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_VIS1, false),
+ DEFINE_PROP_BIT("vis2", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_VIS2, false),
+ DEFINE_PROP_BIT("fsmuld", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_FSMULD, false),
+ DEFINE_PROP_BIT("hypv", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_HYPV, false),
+ DEFINE_PROP_BIT("cmt", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_CMT, false),
+ DEFINE_PROP_BIT("gl", SPARCCPU, env.def.features,
+ CPU_FEATURE_BIT_GL, false),
DEFINE_PROP_UNSIGNED("iu-version", SPARCCPU, env.def.iu_version, 0,
qdev_prop_uint64, target_ulong),
DEFINE_PROP_UINT32("fpu-version", SPARCCPU, env.def.fpu_version, 0),
--
2.34.1
- [PATCH 04/29] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2, (continued)
- [PATCH 04/29] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2, Richard Henderson, 2023/10/25
- [PATCH 02/29] tcg/optimize: Split out arg_is_const_val, Richard Henderson, 2023/10/25
- [PULL 04/94] target/sparc: Set TCG_GUEST_DEFAULT_MO, Richard Henderson, 2023/10/25
- [PATCH 05/29] tcg/optimize: Split out arg_new_constant, Richard Henderson, 2023/10/25
- [PATCH 11/29] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp, Richard Henderson, 2023/10/25
- [PATCH 09/29] tcg/arm: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/25
- [PULL 09/94] target/sparc: Partition cpu features, Richard Henderson, 2023/10/25
- [PULL 10/94] target/sparc: Add decodetree infrastructure, Richard Henderson, 2023/10/25
- [PATCH 01/29] tcg: Introduce TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/25
- [PULL 03/94] target/sparc: Avoid helper_raise_exception in helper_st_asi, Richard Henderson, 2023/10/25
- [PULL 07/94] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties,
Richard Henderson <=
- [PATCH 03/29] tcg/optimize: Split out do_constant_folding_cond1, Richard Henderson, 2023/10/25
- [PATCH 07/29] tcg/aarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/25
- [PATCH 08/29] tcg/aarch64: Generate TBZ, TBNZ, Richard Henderson, 2023/10/25
- [PULL 05/94] configs: Enable MTTCG for sparc, sparc64, Richard Henderson, 2023/10/25
- [PATCH 10/29] tcg/i386: Pass x86 condition codes to tcg_out_cmov, Richard Henderson, 2023/10/25
- [PATCH 12/29] tcg/i386: Add rexw argument to tcg_out_testi, Richard Henderson, 2023/10/25
- [PATCH 14/29] tcg/loongarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/25
- [PULL 14/94] target/sparc: Move BPr to decodetree, Richard Henderson, 2023/10/25
- [PULL 15/94] target/sparc: Move FBPfcc and FBfcc to decodetree, Richard Henderson, 2023/10/25