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[PULL 25/41] hw/intc/pxa2xx: Convert to Resettable interface
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From: |
Peter Maydell |
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Subject: |
[PULL 25/41] hw/intc/pxa2xx: Convert to Resettable interface |
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Date: |
Fri, 27 Oct 2023 15:39:26 +0100 |
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Factor reset code out of the DeviceRealize() handler.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20231020130331.50048-7-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/pxa2xx_pic.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c
index 47132ab982b..2eb869a605a 100644
--- a/hw/arm/pxa2xx_pic.c
+++ b/hw/arm/pxa2xx_pic.c
@@ -271,12 +271,9 @@ static int pxa2xx_pic_post_load(void *opaque, int
version_id)
return 0;
}
-DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
+static void pxa2xx_pic_reset_hold(Object *obj)
{
- DeviceState *dev = qdev_new(TYPE_PXA2XX_PIC);
- PXA2xxPICState *s = PXA2XX_PIC(dev);
-
- s->cpu = cpu;
+ PXA2xxPICState *s = PXA2XX_PIC(obj);
s->int_pending[0] = 0;
s->int_pending[1] = 0;
@@ -284,6 +281,14 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
s->int_enabled[1] = 0;
s->is_fiq[0] = 0;
s->is_fiq[1] = 0;
+}
+
+DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu)
+{
+ DeviceState *dev = qdev_new(TYPE_PXA2XX_PIC);
+ PXA2xxPICState *s = PXA2XX_PIC(dev);
+
+ s->cpu = cpu;
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
@@ -319,9 +324,11 @@ static const VMStateDescription vmstate_pxa2xx_pic_regs = {
static void pxa2xx_pic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
dc->desc = "PXA2xx PIC";
dc->vmsd = &vmstate_pxa2xx_pic_regs;
+ rc->phases.hold = pxa2xx_pic_reset_hold;
}
static const TypeInfo pxa2xx_pic_info = {
--
2.34.1
- [PULL 22/41] hw/pcmcia/pxa2xx: Realize sysbus device before accessing it, (continued)
- [PULL 22/41] hw/pcmcia/pxa2xx: Realize sysbus device before accessing it, Peter Maydell, 2023/10/27
- [PULL 24/41] hw/pcmcia/pxa2xx: Inline pxa2xx_pcmcia_init(), Peter Maydell, 2023/10/27
- [PULL 17/41] hw/arm/fsl-imx7: Remove 'hw/arm/boot.h' from header, Peter Maydell, 2023/10/27
- [PULL 30/41] misc/led: LED state is set opposite of what is expected, Peter Maydell, 2023/10/27
- [PULL 23/41] hw/pcmcia/pxa2xx: Do not open-code sysbus_create_simple(), Peter Maydell, 2023/10/27
- [PULL 29/41] hw/arm: Avoid using 'first_cpu' when first ARM CPU is reachable, Peter Maydell, 2023/10/27
- [PULL 32/41] hw/net/cadence_gem: use FIELD for screening registers, Peter Maydell, 2023/10/27
- [PULL 26/41] hw/intc/pxa2xx: Pass CPU reference using QOM link property, Peter Maydell, 2023/10/27
- [PULL 33/41] hw/net/cadence_gem: use FIELD to describe NWCTRL register fields, Peter Maydell, 2023/10/27
- [PULL 14/41] hw/arm/fsl-imx31: Remove 'hw/arm/boot.h' from header, Peter Maydell, 2023/10/27
- [PULL 25/41] hw/intc/pxa2xx: Convert to Resettable interface,
Peter Maydell <=
- [PULL 39/41] hw/net/cadence_gem: use FIELD to describe PHYMNTNC register fields, Peter Maydell, 2023/10/27
- [PULL 34/41] hw/net/cadence_gem: use FIELD to describe NWCFG register fields, Peter Maydell, 2023/10/27
- [PULL 37/41] hw/net/cadence_gem: use FIELD to describe IRQ register fields, Peter Maydell, 2023/10/27
- [PULL 31/41] hw/net/cadence_gem: use REG32 macro for register definitions, Peter Maydell, 2023/10/27
- [PULL 35/41] hw/net/cadence_gem: use FIELD to describe DMACFG register fields, Peter Maydell, 2023/10/27
- [PULL 27/41] hw/intc/pxa2xx: Factor pxa2xx_pic_realize() out of pxa2xx_pic_init(), Peter Maydell, 2023/10/27
- [PULL 41/41] hw/net/cadence_gem: enforce 32 bits variable size for CRC, Peter Maydell, 2023/10/27
- [PULL 28/41] hw/arm/pxa2xx: Realize PXA2XX_I2C device before accessing it, Peter Maydell, 2023/10/27
- [PULL 20/41] hw/sd/pxa2xx: Realize sysbus device before accessing it, Peter Maydell, 2023/10/27
- [PULL 38/41] hw/net/cadence_gem: use FIELD to describe DESCONF6 register fields, Peter Maydell, 2023/10/27