Re: [PATCH 1/2] hw/i386/x86: Fix PIC interrupt handling if APIC globally disabled

[Bernhard Beschow]

Am 3. Januar 2024 09:12:24 UTC schrieb "Alex Bennée" <alex.bennee@linaro.org>:
>Bernhard Beschow <shentey@gmail.com> writes:
>
>> QEMU populates the apic_state attribute of x86 CPUs if supported by real
>> hardware. Even when the APIC is globally disabled by a guest, this attribute
>> stays populated. This means that the APIC code paths are still used in this
>> case. However, chapter 10.4.3 of [1] requires that:
>>
>>   When IA32_APIC_BASE[11] is 0, the processor is functionally equivalent to 
>> an
>>   IA-32 processor without an on-chip APIC. The CPUID feature flag for the 
>> APIC
>>   [...] is also set to 0.
>>
>> Fix this by checking the APIC feature flag rather than apic_state when 
>> deciding
>> whether PIC or APIC behavior is required. This fixes some real-world BIOSes.
>>
>> Notice that presence of the CPUID_APIC flag implies that apic_state is 
>> non-NULL.
>>
>> [1] Intel 64 and IA-32 Architectures Software Developer's Manual, Vol. 3A:
>>     System Programming Guide, Part 1
>>
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>> ---
>>  hw/i386/x86.c | 10 +++++-----
>>  1 file changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/hw/i386/x86.c b/hw/i386/x86.c
>> index 2b6291ad8d..a753d1aeca 100644
>> --- a/hw/i386/x86.c
>> +++ b/hw/i386/x86.c
>> @@ -516,10 +516,10 @@ static void x86_nmi(NMIState *n, int cpu_index, Error 
>> **errp)
>>      CPU_FOREACH(cs) {
>>          X86CPU *cpu = X86_CPU(cs);
>>  
>> -        if (!cpu->apic_state) {
>> -            cpu_interrupt(cs, CPU_INTERRUPT_NMI);
>> -        } else {
>> +        if (cpu->env.features[FEAT_1_EDX] & CPUID_APIC) {
>
>You could assert the relationship between the feature and ->apic_state with:
>
>  g_assert(cpu->apic_state)
>
>But probably unnecessary in the grand scheme of things.

I like the idea so I'll respin.

Thanks,
Bernhard 

> Anyway:
>
>Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>