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[PULL 15/65] hw/riscv: virt: Make few IMSIC macros and functions public
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From: |
Alistair Francis |
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Subject: |
[PULL 15/65] hw/riscv: virt: Make few IMSIC macros and functions public |
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Date: |
Wed, 10 Jan 2024 18:56:43 +1000 |
From: Sunil V L <sunilvl@ventanamicro.com>
Some macros and static function related to IMSIC are defined in virt.c.
They are required in virt-acpi-build.c. So, make them public.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20231218150247.466427-5-sunilvl@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
include/hw/riscv/virt.h | 25 +++++++++++++++++++++++++
hw/riscv/virt.c | 25 +------------------------
2 files changed, 26 insertions(+), 24 deletions(-)
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index e5c474b26e..5b03575ed3 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -23,6 +23,7 @@
#include "hw/riscv/riscv_hart.h"
#include "hw/sysbus.h"
#include "hw/block/flash.h"
+#include "hw/intc/riscv_imsic.h"
#define VIRT_CPUS_MAX_BITS 9
#define VIRT_CPUS_MAX (1 << VIRT_CPUS_MAX_BITS)
@@ -127,4 +128,28 @@ enum {
bool virt_is_acpi_enabled(RISCVVirtState *s);
void virt_acpi_setup(RISCVVirtState *vms);
+uint32_t imsic_num_bits(uint32_t count);
+
+/*
+ * The virt machine physical address space used by some of the devices
+ * namely ACLINT, PLIC, APLIC, and IMSIC depend on number of Sockets,
+ * number of CPUs, and number of IMSIC guest files.
+ *
+ * Various limits defined by VIRT_SOCKETS_MAX_BITS, VIRT_CPUS_MAX_BITS,
+ * and VIRT_IRQCHIP_MAX_GUESTS_BITS are tuned for maximum utilization
+ * of virt machine physical address space.
+ */
+
+#define VIRT_IMSIC_GROUP_MAX_SIZE (1U << IMSIC_MMIO_GROUP_MIN_SHIFT)
+#if VIRT_IMSIC_GROUP_MAX_SIZE < \
+ IMSIC_GROUP_SIZE(VIRT_CPUS_MAX_BITS, VIRT_IRQCHIP_MAX_GUESTS_BITS)
+#error "Can't accomodate single IMSIC group in address space"
+#endif
+
+#define VIRT_IMSIC_MAX_SIZE (VIRT_SOCKETS_MAX * \
+ VIRT_IMSIC_GROUP_MAX_SIZE)
+#if 0x4000000 < VIRT_IMSIC_MAX_SIZE
+#error "Can't accomodate all IMSIC groups in address space"
+#endif
+
#endif
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d2eac24156..9e7629c51c 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -38,7 +38,6 @@
#include "kvm/kvm_riscv.h"
#include "hw/intc/riscv_aclint.h"
#include "hw/intc/riscv_aplic.h"
-#include "hw/intc/riscv_imsic.h"
#include "hw/intc/sifive_plic.h"
#include "hw/misc/sifive_test.h"
#include "hw/platform-bus.h"
@@ -54,28 +53,6 @@
#include "hw/acpi/aml-build.h"
#include "qapi/qapi-visit-common.h"
-/*
- * The virt machine physical address space used by some of the devices
- * namely ACLINT, PLIC, APLIC, and IMSIC depend on number of Sockets,
- * number of CPUs, and number of IMSIC guest files.
- *
- * Various limits defined by VIRT_SOCKETS_MAX_BITS, VIRT_CPUS_MAX_BITS,
- * and VIRT_IRQCHIP_MAX_GUESTS_BITS are tuned for maximum utilization
- * of virt machine physical address space.
- */
-
-#define VIRT_IMSIC_GROUP_MAX_SIZE (1U << IMSIC_MMIO_GROUP_MIN_SHIFT)
-#if VIRT_IMSIC_GROUP_MAX_SIZE < \
- IMSIC_GROUP_SIZE(VIRT_CPUS_MAX_BITS, VIRT_IRQCHIP_MAX_GUESTS_BITS)
-#error "Can't accommodate single IMSIC group in address space"
-#endif
-
-#define VIRT_IMSIC_MAX_SIZE (VIRT_SOCKETS_MAX * \
- VIRT_IMSIC_GROUP_MAX_SIZE)
-#if 0x4000000 < VIRT_IMSIC_MAX_SIZE
-#error "Can't accommodate all IMSIC groups in address space"
-#endif
-
/* KVM AIA only supports APLIC MSI. APLIC Wired is always emulated by QEMU. */
static bool virt_use_kvm_aia(RISCVVirtState *s)
{
@@ -512,7 +489,7 @@ static void create_fdt_socket_plic(RISCVVirtState *s,
g_free(plic_cells);
}
-static uint32_t imsic_num_bits(uint32_t count)
+uint32_t imsic_num_bits(uint32_t count)
{
uint32_t ret = 0;
--
2.43.0
- [PULL 05/65] target/riscv/pmp: Use hwaddr instead of target_ulong for RV32, (continued)
- [PULL 05/65] target/riscv/pmp: Use hwaddr instead of target_ulong for RV32, Alistair Francis, 2024/01/10
- [PULL 06/65] target/riscv/cpu.c: fix machine IDs getters, Alistair Francis, 2024/01/10
- [PULL 07/65] target/riscv/kvm: change KVM_REG_RISCV_FP_F to u32, Alistair Francis, 2024/01/10
- [PULL 08/65] target/riscv/kvm: change KVM_REG_RISCV_FP_D to u64, Alistair Francis, 2024/01/10
- [PULL 09/65] target/riscv/kvm: change timer regs size to u64, Alistair Francis, 2024/01/10
- [PULL 11/65] target/riscv/kvm: rename riscv_reg_id() to riscv_reg_id_ulong(), Alistair Francis, 2024/01/10
- [PULL 12/65] hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location, Alistair Francis, 2024/01/10
- [PULL 13/65] hw/arm/virt-acpi-build.c: Migrate virtio creation to common location, Alistair Francis, 2024/01/10
- [PULL 10/65] target/riscv/kvm: add RISCV_CONFIG_REG(), Alistair Francis, 2024/01/10
- [PULL 14/65] hw/i386/acpi-microvm.c: Use common function to add virtio in DSDT, Alistair Francis, 2024/01/10
- [PULL 15/65] hw/riscv: virt: Make few IMSIC macros and functions public,
Alistair Francis <=
- [PULL 16/65] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC, Alistair Francis, 2024/01/10
- [PULL 17/65] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT, Alistair Francis, 2024/01/10
- [PULL 20/65] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT, Alistair Francis, 2024/01/10
- [PULL 19/65] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT, Alistair Francis, 2024/01/10
- [PULL 21/65] hw/pci-host/gpex: Define properties for MMIO ranges, Alistair Francis, 2024/01/10
- [PULL 22/65] hw/riscv/virt: Update GPEX MMIO related properties, Alistair Francis, 2024/01/10
- [PULL 23/65] hw/riscv/virt-acpi-build.c: Add IO controllers and devices, Alistair Francis, 2024/01/10
- [PULL 24/65] hw/riscv/virt-acpi-build.c: Add PLIC in MADT, Alistair Francis, 2024/01/10
- [PULL 25/65] hw/riscv/virt.c: fix the interrupts-extended property format of PLIC, Alistair Francis, 2024/01/10
- [PULL 26/65] target/riscv: Add support for Zacas extension, Alistair Francis, 2024/01/10