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[PATCH v3 22/38] tcg/i386: Pass x86 condition codes to tcg_out_cmov
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From: |
Richard Henderson |
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Subject: |
[PATCH v3 22/38] tcg/i386: Pass x86 condition codes to tcg_out_cmov |
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Date: |
Thu, 11 Jan 2024 09:43:52 +1100 |
Hoist the tcg_cond_to_jcc index outside the function.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index accaaa2660..2d6100a8f4 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1699,14 +1699,14 @@ static void tcg_out_setcond2(TCGContext *s, const
TCGArg *args,
}
#endif
-static void tcg_out_cmov(TCGContext *s, TCGCond cond, int rexw,
+static void tcg_out_cmov(TCGContext *s, int jcc, int rexw,
TCGReg dest, TCGReg v1)
{
if (have_cmov) {
- tcg_out_modrm(s, OPC_CMOVCC | tcg_cond_to_jcc[cond] | rexw, dest, v1);
+ tcg_out_modrm(s, OPC_CMOVCC | jcc | rexw, dest, v1);
} else {
TCGLabel *over = gen_new_label();
- tcg_out_jxx(s, tcg_cond_to_jcc[tcg_invert_cond(cond)], over, 1);
+ tcg_out_jxx(s, jcc ^ 1, over, 1);
tcg_out_mov(s, TCG_TYPE_I32, dest, v1);
tcg_out_label(s, over);
}
@@ -1717,7 +1717,7 @@ static void tcg_out_movcond(TCGContext *s, int rexw,
TCGCond cond,
TCGReg v1)
{
tcg_out_cmp(s, c1, c2, const_c2, rexw);
- tcg_out_cmov(s, cond, rexw, dest, v1);
+ tcg_out_cmov(s, tcg_cond_to_jcc[cond], rexw, dest, v1);
}
static void tcg_out_ctz(TCGContext *s, int rexw, TCGReg dest, TCGReg arg1,
@@ -1729,12 +1729,12 @@ static void tcg_out_ctz(TCGContext *s, int rexw, TCGReg
dest, TCGReg arg1,
tcg_debug_assert(arg2 == (rexw ? 64 : 32));
} else {
tcg_debug_assert(dest != arg2);
- tcg_out_cmov(s, TCG_COND_LTU, rexw, dest, arg2);
+ tcg_out_cmov(s, JCC_JB, rexw, dest, arg2);
}
} else {
tcg_debug_assert(dest != arg2);
tcg_out_modrm(s, OPC_BSF + rexw, dest, arg1);
- tcg_out_cmov(s, TCG_COND_EQ, rexw, dest, arg2);
+ tcg_out_cmov(s, JCC_JE, rexw, dest, arg2);
}
}
@@ -1747,7 +1747,7 @@ static void tcg_out_clz(TCGContext *s, int rexw, TCGReg
dest, TCGReg arg1,
tcg_debug_assert(arg2 == (rexw ? 64 : 32));
} else {
tcg_debug_assert(dest != arg2);
- tcg_out_cmov(s, TCG_COND_LTU, rexw, dest, arg2);
+ tcg_out_cmov(s, JCC_JB, rexw, dest, arg2);
}
} else {
tcg_debug_assert(!const_a2);
@@ -1760,7 +1760,7 @@ static void tcg_out_clz(TCGContext *s, int rexw, TCGReg
dest, TCGReg arg1,
/* Since we have destroyed the flags from BSR, we have to re-test. */
tcg_out_cmp(s, arg1, 0, 1, rexw);
- tcg_out_cmov(s, TCG_COND_EQ, rexw, dest, arg2);
+ tcg_out_cmov(s, JCC_JE, rexw, dest, arg2);
}
}
--
2.34.1
- Re: [PATCH v3 15/38 6/6] target/s390x: Improve general case of disas_jcc, (continued)
- [PATCH v3 21/38] tcg/arm: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 12/38] target/m68k: Use TCG_COND_TST{EQ, NE} in gen_fcc_cond, Richard Henderson, 2024/01/10
- [PATCH v3 19/38] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX, Richard Henderson, 2024/01/10
- [PATCH v3 20/38] tcg/arm: Factor tcg_out_cmp() out, Richard Henderson, 2024/01/10
- [PATCH v3 22/38] tcg/i386: Pass x86 condition codes to tcg_out_cmov,
Richard Henderson <=
- [PATCH v3 24/38] tcg/i386: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 31/38] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel, Richard Henderson, 2024/01/10
- [PATCH v3 17/38] tcg/aarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 32/38] tcg/ppc: Tidy up tcg_target_const_match, Richard Henderson, 2024/01/10
- [PATCH v3 25/38] tcg/i386: Improve TSTNE/TESTEQ vs powers of two, Richard Henderson, 2024/01/10
- [PATCH v3 26/38] tcg/i386: Use TEST r,r to test 8/16/32 bits, Richard Henderson, 2024/01/10
- [PATCH v3 23/38] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp, Richard Henderson, 2024/01/10