[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 29/38] tcg/sparc64: Support TCG_COND_TST{EQ,NE}
|
From: |
Richard Henderson |
|
Subject: |
[PATCH v3 29/38] tcg/sparc64: Support TCG_COND_TST{EQ,NE} |
|
Date: |
Thu, 11 Jan 2024 09:43:59 +1100 |
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/sparc64/tcg-target.h | 2 +-
tcg/sparc64/tcg-target.c.inc | 16 ++++++++++++++--
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h
index ae2910c4ee..a18906a14e 100644
--- a/tcg/sparc64/tcg-target.h
+++ b/tcg/sparc64/tcg-target.h
@@ -149,7 +149,7 @@ extern bool use_vis3_instructions;
#define TCG_TARGET_HAS_qemu_ldst_i128 0
-#define TCG_TARGET_HAS_tst 0
+#define TCG_TARGET_HAS_tst 1
#define TCG_AREG0 TCG_REG_I0
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index 10fb8a1a0d..176c98740b 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -607,9 +607,11 @@ static void tcg_out_div32(TCGContext *s, TCGReg rd, TCGReg
rs1,
uns ? ARITH_UDIV : ARITH_SDIV);
}
-static const uint8_t tcg_cond_to_bcond[] = {
+static const uint8_t tcg_cond_to_bcond[16] = {
[TCG_COND_EQ] = COND_E,
[TCG_COND_NE] = COND_NE,
+ [TCG_COND_TSTEQ] = COND_E,
+ [TCG_COND_TSTNE] = COND_NE,
[TCG_COND_LT] = COND_L,
[TCG_COND_GE] = COND_GE,
[TCG_COND_LE] = COND_LE,
@@ -649,7 +651,8 @@ static void tcg_out_bpcc(TCGContext *s, int scond, int
flags, TCGLabel *l)
static void tcg_out_cmp(TCGContext *s, TCGCond cond,
TCGReg c1, int32_t c2, int c2const)
{
- tcg_out_arithc(s, TCG_REG_G0, c1, c2, c2const, ARITH_SUBCC);
+ tcg_out_arithc(s, TCG_REG_G0, c1, c2, c2const,
+ is_tst_cond(cond) ? ARITH_ANDCC : ARITH_SUBCC);
}
static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGReg arg1,
@@ -744,6 +747,15 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond
cond, TCGReg ret,
cond = (cond == TCG_COND_EQ ? TCG_COND_GEU : TCG_COND_LTU);
break;
+ case TCG_COND_TSTEQ:
+ case TCG_COND_TSTNE:
+ /* Transform to inequality vs zero. */
+ tcg_out_arithc(s, TCG_REG_T1, c1, c2, c2const, ARITH_AND);
+ c1 = TCG_REG_G0;
+ c2 = TCG_REG_T1, c2const = 0;
+ cond = (cond == TCG_COND_TSTEQ ? TCG_COND_GEU : TCG_COND_LTU);
+ break;
+
case TCG_COND_GTU:
case TCG_COND_LEU:
/* If we don't need to load a constant into a register, we can
--
2.34.1
- Re: [PATCH v3 31/38] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel, (continued)
- [PATCH v3 17/38] tcg/aarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 32/38] tcg/ppc: Tidy up tcg_target_const_match, Richard Henderson, 2024/01/10
- [PATCH v3 25/38] tcg/i386: Improve TSTNE/TESTEQ vs powers of two, Richard Henderson, 2024/01/10
- [PATCH v3 26/38] tcg/i386: Use TEST r,r to test 8/16/32 bits, Richard Henderson, 2024/01/10
- [PATCH v3 23/38] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp, Richard Henderson, 2024/01/10
- [PATCH v3 27/38] tcg/sparc64: Hoist read of tcg_cond_to_rcond, Richard Henderson, 2024/01/10
- [PATCH v3 28/38] tcg/sparc64: Pass TCGCond to tcg_out_cmp, Richard Henderson, 2024/01/10
- [PATCH v3 29/38] tcg/sparc64: Support TCG_COND_TST{EQ,NE},
Richard Henderson <=
- [PATCH v3 30/38] tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc, Richard Henderson, 2024/01/10
- [PATCH v3 33/38] tcg/ppc: Add TCG_CT_CONST_CMP, Richard Henderson, 2024/01/10
- [PATCH v3 34/38] tcg/ppc: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 35/38] tcg/s390x: Split constraint A into J+U, Richard Henderson, 2024/01/10
- [PATCH v3 36/38] tcg/s390x: Add TCG_CT_CONST_CMP, Richard Henderson, 2024/01/10
- [PATCH v3 37/38] tcg/s390x: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10