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[PULL 20/41] target/arm: Make NV reads of CurrentEL return EL2
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From: |
Peter Maydell |
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Subject: |
[PULL 20/41] target/arm: Make NV reads of CurrentEL return EL2 |
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Date: |
Thu, 11 Jan 2024 11:04:44 +0000 |
FEAT_NV requires that when HCR_EL2.NV is set reads of the CurrentEL
register from EL1 always report EL2 rather than the real EL.
Implement this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
---
target/arm/tcg/translate-a64.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index f5377dbaf2d..ed1cc019a4c 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -2241,12 +2241,17 @@ static void handle_sys(DisasContext *s, bool isread,
}
return;
case ARM_CP_CURRENTEL:
- /* Reads as current EL value from pstate, which is
+ {
+ /*
+ * Reads as current EL value from pstate, which is
* guaranteed to be constant by the tb flags.
+ * For nested virt we should report EL2.
*/
+ int el = s->nv ? 2 : s->current_el;
tcg_rt = cpu_reg(s, rt);
- tcg_gen_movi_i64(tcg_rt, s->current_el << 2);
+ tcg_gen_movi_i64(tcg_rt, el << 2);
return;
+ }
case ARM_CP_DC_ZVA:
/* Writes clear the aligned block of memory which rt points into. */
if (s->mte_active[0]) {
--
2.34.1
- [PULL 12/41] target/arm: Enable trapping of ERET for FEAT_NV, (continued)
- [PULL 12/41] target/arm: Enable trapping of ERET for FEAT_NV, Peter Maydell, 2024/01/11
- [PULL 19/41] target/arm: Trap sysreg accesses for FEAT_NV, Peter Maydell, 2024/01/11
- [PULL 22/41] target/arm: Trap registers when HCR_EL2.{NV, NV1} == {1, 1}, Peter Maydell, 2024/01/11
- [PULL 27/41] target/arm: Add FEAT_NV to max, neoverse-n2, neoverse-v1 CPUs, Peter Maydell, 2024/01/11
- [PULL 24/41] target/arm: Don't honour PSTATE.PAN when HCR_EL2.{NV, NV1} == {1, 1}, Peter Maydell, 2024/01/11
- [PULL 39/41] target/arm: Report HCR_EL2.{NV,NV1,NV2} in cpu dumps, Peter Maydell, 2024/01/11
- [PULL 31/41] target/arm: Handle FEAT_NV2 redirection of SPSR_EL2, ELR_EL2, ESR_EL2, FAR_EL2, Peter Maydell, 2024/01/11
- [PULL 40/41] target/arm: Enhance CPU_LOG_INT to show SPSR on AArch64 exception-entry, Peter Maydell, 2024/01/11
- [PULL 17/41] target/arm: Make EL2 cpreg accessfns safe for FEAT_NV EL1 accesses, Peter Maydell, 2024/01/11
- [PULL 21/41] target/arm: Set SPSR_EL1.M correctly when nested virt is enabled, Peter Maydell, 2024/01/11
- [PULL 20/41] target/arm: Make NV reads of CurrentEL return EL2,
Peter Maydell <=
- [PULL 18/41] target/arm: Move FPU/SVE/SME access checks up above ARM_CP_SPECIAL_MASK check, Peter Maydell, 2024/01/11
- [PULL 26/41] target/arm: Handle FEAT_NV page table attribute changes, Peter Maydell, 2024/01/11
- [PULL 35/41] target/arm: Mark up VNCR offsets (offsets 0x100..0x160), Peter Maydell, 2024/01/11
- [PULL 30/41] target/arm: Handle FEAT_NV2 changes to when SPSR_EL1.M reports EL2, Peter Maydell, 2024/01/11
- Re: [PULL 00/41] target-arm queue, Peter Maydell, 2024/01/11