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[PULL 26/35] target/s390x: Use insn_start from DisasContextBase
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From: |
Richard Henderson |
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Subject: |
[PULL 26/35] target/s390x: Use insn_start from DisasContextBase |
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Date: |
Mon, 8 Apr 2024 07:49:20 -1000 |
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/s390x/tcg/translate.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 57b7db1ee9..90a74ee795 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -141,7 +141,6 @@ struct DisasFields {
struct DisasContext {
DisasContextBase base;
const DisasInsn *insn;
- TCGOp *insn_start;
DisasFields fields;
uint64_t ex_value;
/*
@@ -6314,7 +6313,7 @@ static DisasJumpType translate_one(CPUS390XState *env,
DisasContext *s)
insn = extract_insn(env, s);
/* Update insn_start now that we know the ILEN. */
- tcg_set_insn_start_param(s->insn_start, 2, s->ilen);
+ tcg_set_insn_start_param(s->base.insn_start, 2, s->ilen);
/* Not found means unimplemented/illegal opcode. */
if (insn == NULL) {
@@ -6468,7 +6467,6 @@ static void s390x_tr_insn_start(DisasContextBase *dcbase,
CPUState *cs)
/* Delay the set of ilen until we've read the insn. */
tcg_gen_insn_start(dc->base.pc_next, dc->cc_op, 0);
- dc->insn_start = tcg_last_op();
}
static target_ulong get_next_pc(CPUS390XState *env, DisasContext *s,
--
2.34.1
- [PULL 16/35] target/m68k: Pass semihosting arg to exit, (continued)
- [PULL 16/35] target/m68k: Pass semihosting arg to exit, Richard Henderson, 2024/04/08
- [PULL 15/35] target/m68k: Map FPU exceptions to FPSR register, Richard Henderson, 2024/04/08
- [PULL 17/35] target/m68k: Perform the semihosting test during translate, Richard Henderson, 2024/04/08
- [PULL 18/35] target/m68k: Support semihosting on non-ColdFire targets, Richard Henderson, 2024/04/08
- [PULL 19/35] tcg: Add TCGContext.emit_before_op, Richard Henderson, 2024/04/08
- [PULL 20/35] accel/tcg: Add insn_start to DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 21/35] target/arm: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 23/35] target/i386: Preserve DisasContextBase.insn_start across rewind, Richard Henderson, 2024/04/08
- [PULL 24/35] target/microblaze: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 25/35] target/riscv: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 26/35] target/s390x: Use insn_start from DisasContextBase,
Richard Henderson <=
- [PULL 27/35] accel/tcg: Improve can_do_io management, Richard Henderson, 2024/04/08
- [PULL 29/35] util/bufferiszero: Remove AVX512 variant, Richard Henderson, 2024/04/08
- [PULL 28/35] util/bufferiszero: Remove SSE4.1 variant, Richard Henderson, 2024/04/08
- [PULL 30/35] util/bufferiszero: Reorganize for early test for acceleration, Richard Henderson, 2024/04/08
- [PULL 22/35] target/hppa: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 33/35] util/bufferiszero: Improve scalar variant, Richard Henderson, 2024/04/08
- [PULL 31/35] util/bufferiszero: Remove useless prefetches, Richard Henderson, 2024/04/08
- [PULL 34/35] util/bufferiszero: Introduce biz_accel_fn typedef, Richard Henderson, 2024/04/08
- [PULL 35/35] util/bufferiszero: Simplify test_buffer_is_zero_next_accel, Richard Henderson, 2024/04/08
- [PULL 32/35] util/bufferiszero: Optimize SSE2 and AVX2 variants, Richard Henderson, 2024/04/08