Re: Re: how does the qemu emulate the "atomic" semantics on host that DOES NOT support atomic instructions?

[Peter Maydell]

On Tue, 9 Apr 2024 at 11:40, tugouxp <13824125580@163.com> wrote:
> ===>yes, i somehow a little bit of guess such like that, but when try to find 
> some code in qemu to prove the guess, i found i was lost and exausted in the 
> ocean of the code and complex logic of qeumu.
> because in my thougth, it may be do the sync in user pthread level, so i grep 
> the "pthread" "mutex", "condtion",... and so on, but did not find any 
> position to prove this thought.
> so, can you offer me the demo code position of do the sync like "pause 
> execution of all the other guest vCPU threads,", to make the atomic 
> operations meet the sematics?

I would suggest starting by translating some guest code
with the atomic operation you're interested in, and using
the '-d' suboptions in_asm, op and out_asm to look at the
generated TCG operations and the generated host code for it.

The stop-the-world handling happens when something calls
cpu_loop_exit_atomic(), which then raises an EXCP_ATOMIC
internal-to-QEMU exception, which is handled by some
top-level-loop code that calls cpu_exec_step_atomic(),
which (a) uses start_exclusive() and end_exclusive() to
ensure that it is the only vcpu running and (b) generates
new host code with the CF_PARALLEL flag clear to tell
the translator that it can assume it's the only thing
running (which in turn means "you don't need to actually
do this operation atomically").

thanks
-- PMM