[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL v2 14/20] target/hppa: Use insn_start from DisasContextBase
|
From: |
Richard Henderson |
|
Subject: |
[PULL v2 14/20] target/hppa: Use insn_start from DisasContextBase |
|
Date: |
Tue, 9 Apr 2024 09:35:57 -1000 |
To keep the multiple update check, replace insn_start
with insn_start_updated.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/translate.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 8a1a8bc3aa..42fa480950 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -44,7 +44,6 @@ typedef struct DisasCond {
typedef struct DisasContext {
DisasContextBase base;
CPUState *cs;
- TCGOp *insn_start;
uint64_t iaoq_f;
uint64_t iaoq_b;
@@ -62,6 +61,7 @@ typedef struct DisasContext {
int privilege;
bool psw_n_nonzero;
bool is_pa20;
+ bool insn_start_updated;
#ifdef CONFIG_USER_ONLY
MemOp unalign;
@@ -300,9 +300,9 @@ void hppa_translate_init(void)
static void set_insn_breg(DisasContext *ctx, int breg)
{
- assert(ctx->insn_start != NULL);
- tcg_set_insn_start_param(ctx->insn_start, 2, breg);
- ctx->insn_start = NULL;
+ assert(!ctx->insn_start_updated);
+ ctx->insn_start_updated = true;
+ tcg_set_insn_start_param(ctx->base.insn_start, 2, breg);
}
static DisasCond cond_make_f(void)
@@ -4694,7 +4694,7 @@ static void hppa_tr_insn_start(DisasContextBase *dcbase,
CPUState *cs)
DisasContext *ctx = container_of(dcbase, DisasContext, base);
tcg_gen_insn_start(ctx->iaoq_f, ctx->iaoq_b, 0);
- ctx->insn_start = tcg_last_op();
+ ctx->insn_start_updated = false;
}
static void hppa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
--
2.34.1
- [PULL v2 03/20] linux-user: replace calloc() with g_new0(), (continued)
- [PULL v2 03/20] linux-user: replace calloc() with g_new0(), Richard Henderson, 2024/04/09
- [PULL v2 04/20] target/hppa: Fix IIAOQ, IIASQ for pa2.0, Richard Henderson, 2024/04/09
- [PULL v2 05/20] target/sh4: mac.w: memory accesses are 16-bit words, Richard Henderson, 2024/04/09
- [PULL v2 06/20] target/sh4: Merge mach and macl into a union, Richard Henderson, 2024/04/09
- [PULL v2 07/20] target/sh4: Fix mac.l with saturation enabled, Richard Henderson, 2024/04/09
- [PULL v2 08/20] target/sh4: Fix mac.w with saturation enabled, Richard Henderson, 2024/04/09
- [PULL v2 09/20] target/sh4: add missing CHECK_NOT_DELAY_SLOT, Richard Henderson, 2024/04/09
- [PULL v2 10/20] target/m68k: Map FPU exceptions to FPSR register, Richard Henderson, 2024/04/09
- [PULL v2 11/20] tcg: Add TCGContext.emit_before_op, Richard Henderson, 2024/04/09
- [PULL v2 12/20] accel/tcg: Add insn_start to DisasContextBase, Richard Henderson, 2024/04/09
- [PULL v2 14/20] target/hppa: Use insn_start from DisasContextBase,
Richard Henderson <=
- [PULL v2 13/20] target/arm: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/09
- [PULL v2 15/20] target/i386: Preserve DisasContextBase.insn_start across rewind, Richard Henderson, 2024/04/09
- [PULL v2 16/20] target/microblaze: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/09
- [PULL v2 17/20] target/riscv: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/09
- [PULL v2 18/20] target/s390x: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/09
- [PULL v2 19/20] accel/tcg: Improve can_do_io management, Richard Henderson, 2024/04/09
- [PULL v2 20/20] linux-user: Preserve unswapped siginfo_t for strace, Richard Henderson, 2024/04/09
- Re: [PULL v2 00/20] misc patch queue, Peter Maydell, 2024/04/10
- Re: [PULL v2 00/20] misc patch queue, Michael Tokarev, 2024/04/10