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Re: [PATCH v4 1/1] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machi


From: Richard Henderson
Subject: Re: [PATCH v4 1/1] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine
Date: Mon, 29 Apr 2024 05:21:55 -0700
User-agent: Mozilla Thunderbird

On 4/28/24 23:35, Marcin Juszkiewicz wrote:
W dniu 26.04.2024 o 18:06, Richard Henderson pisze:

Isn't this basically what MPIDR_EL1 is supposed to indicate?
We do not yet implement all of that in QEMU, but should.

QEMU has socket/cluster/core/thread model which could map to
aff3/aff2/aff1/aff0 (or aff0/1/2/3) of MPIDR_EL1 register, right? But it does 
not.

Yes, I know, but there's patches on list that started to deal with MPIDR.SMT,

  
20240419183135.12276-1-dorjoychy111@gmail.com/">https://lore.kernel.org/qemu-devel/20240419183135.12276-1-dorjoychy111@gmail.com/

and I suggested that we go whole hog and support all of the -smp options.


r~



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