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[PATCH v3 13/13] accel/tcg: Move @tb_jmp_cache from CPUState to TCG Acce
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH v3 13/13] accel/tcg: Move @tb_jmp_cache from CPUState to TCG AccelCPUState |
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Date: |
Tue, 30 Apr 2024 14:28:07 +0200 |
@tb_jmp_cache is specific to TCG accelerator, move it to its
AccelCPUState. Remove the NULL check in tcg_flush_jmp_cache().
Cc: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240428221450.26460-21-philmd@linaro.org>
---
accel/tcg/tb-jmp-cache.h | 4 ++--
accel/tcg/vcpu-state.h | 2 ++
include/hw/core/cpu.h | 2 --
include/qemu/typedefs.h | 1 -
accel/tcg/cpu-exec.c | 7 +++----
accel/tcg/cputlb.c | 2 +-
accel/tcg/tb-maint.c | 2 +-
accel/tcg/translate-all.c | 7 +------
8 files changed, 10 insertions(+), 17 deletions(-)
diff --git a/accel/tcg/tb-jmp-cache.h b/accel/tcg/tb-jmp-cache.h
index 184bb3e3e2..c3a505e394 100644
--- a/accel/tcg/tb-jmp-cache.h
+++ b/accel/tcg/tb-jmp-cache.h
@@ -22,12 +22,12 @@
* non-NULL value of 'tb'. Strictly speaking pc is only needed for
* CF_PCREL, but it's used always for simplicity.
*/
-struct CPUJumpCache {
+typedef struct CPUJumpCache {
struct rcu_head rcu;
struct {
TranslationBlock *tb;
vaddr pc;
} array[TB_JMP_CACHE_SIZE];
-};
+} CPUJumpCache;
#endif /* ACCEL_TCG_TB_JMP_CACHE_H */
diff --git a/accel/tcg/vcpu-state.h b/accel/tcg/vcpu-state.h
index 716a0119c4..7fff5413e9 100644
--- a/accel/tcg/vcpu-state.h
+++ b/accel/tcg/vcpu-state.h
@@ -7,6 +7,7 @@
#define ACCEL_TCG_VCPU_STATE_H
#include "hw/core/cpu.h"
+#include "tb-jmp-cache.h"
/**
* AccelCPUState: vCPU fields specific to TCG accelerator
@@ -19,6 +20,7 @@ struct AccelCPUState {
uint32_t cflags_next_tb;
sigjmp_buf jmp_env;
+ CPUJumpCache tb_jmp_cache;
#ifdef CONFIG_USER_ONLY
TaskState *ts;
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index f06bb1e93a..c0c28befd3 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -479,8 +479,6 @@ struct CPUState {
AddressSpace *as;
MemoryRegion *memory;
- CPUJumpCache *tb_jmp_cache;
-
GArray *gdb_regs;
int gdb_num_regs;
int gdb_num_g_regs;
diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h
index 36f2825725..daf9009332 100644
--- a/include/qemu/typedefs.h
+++ b/include/qemu/typedefs.h
@@ -44,7 +44,6 @@ typedef struct CPUAddressSpace CPUAddressSpace;
typedef struct CPUArchState CPUArchState;
typedef struct CPUPluginState CPUPluginState;
typedef struct CpuInfoFast CpuInfoFast;
-typedef struct CPUJumpCache CPUJumpCache;
typedef struct CPUState CPUState;
typedef struct CPUTLBEntryFull CPUTLBEntryFull;
typedef struct DeviceListener DeviceListener;
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index a491278082..f813c68d1e 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -262,7 +262,7 @@ static inline TranslationBlock *tb_lookup(CPUState *cpu,
vaddr pc,
tcg_debug_assert(!(cflags & CF_INVALID));
hash = tb_jmp_cache_hash_func(pc);
- jc = cpu->tb_jmp_cache;
+ jc = &cpu->accel->tb_jmp_cache;
tb = qatomic_read(&jc->array[hash].tb);
if (likely(tb &&
@@ -1011,7 +1011,7 @@ cpu_exec_loop(CPUState *cpu, SyncClocks *sc)
* for the fast lookup
*/
h = tb_jmp_cache_hash_func(pc);
- jc = cpu->tb_jmp_cache;
+ jc = &cpu->accel->tb_jmp_cache;
jc->array[h].pc = pc;
qatomic_set(&jc->array[h].tb, tb);
}
@@ -1090,7 +1090,6 @@ bool tcg_exec_realizefn(CPUState *cpu, Error **errp)
tcg_target_initialized = true;
}
- cpu->tb_jmp_cache = g_new0(CPUJumpCache, 1);
tlb_init(cpu);
#ifndef CONFIG_USER_ONLY
tcg_iommu_init_notifier_list(cpu);
@@ -1108,5 +1107,5 @@ void tcg_exec_unrealizefn(CPUState *cpu)
#endif /* !CONFIG_USER_ONLY */
tlb_destroy(cpu);
- g_free_rcu(cpu->tb_jmp_cache, rcu);
+ g_free_rcu(&cpu->accel->tb_jmp_cache, rcu);
}
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index cdb3e12dfb..eaa60d1da2 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -156,7 +156,7 @@ static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns,
static void tb_jmp_cache_clear_page(CPUState *cpu, vaddr page_addr)
{
- CPUJumpCache *jc = cpu->tb_jmp_cache;
+ CPUJumpCache *jc = &cpu->accel->tb_jmp_cache;
int i, i0;
if (unlikely(!jc)) {
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 2d5faca9fd..83758648f2 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -888,7 +888,7 @@ static void tb_jmp_cache_inval_tb(TranslationBlock *tb)
uint32_t h = tb_jmp_cache_hash_func(tb->pc);
CPU_FOREACH(cpu) {
- CPUJumpCache *jc = cpu->tb_jmp_cache;
+ CPUJumpCache *jc = &cpu->accel->tb_jmp_cache;
if (qatomic_read(&jc->array[h].tb) == tb) {
qatomic_set(&jc->array[h].tb, NULL);
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 3a8199a761..9b02f21b23 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -652,12 +652,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
*/
void tcg_flush_jmp_cache(CPUState *cpu)
{
- CPUJumpCache *jc = cpu->tb_jmp_cache;
-
- /* During early initialization, the cache may not yet be allocated. */
- if (unlikely(jc == NULL)) {
- return;
- }
+ CPUJumpCache *jc = &cpu->accel->tb_jmp_cache;
for (int i = 0; i < TB_JMP_CACHE_SIZE; i++) {
qatomic_set(&jc->array[i].tb, NULL);
--
2.41.0
- [PATCH v3 03/13] accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState, (continued)
- [PATCH v3 03/13] accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 04/13] accel/tcg: Move @plugin_state from CPUState to TCG AccelCPUState, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 05/13] accel/tcg: Restrict cpu_loop_exit_requested() to TCG, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 06/13] accel/tcg: Restrict IcountDecr / can_do_io / CPUTLB to TCG, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 07/13] accel/tcg: Move @jmp_env from CPUState to TCG AccelCPUState, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 08/13] accel/tcg: Move @cflags_next_tb from CPUState to TCG AccelCPUState, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 09/13] accel/tcg: Move @iommu_notifiers from CPUState to TCG AccelCPUState, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 10/13] accel/tcg: Move @tcg_cflags from CPUState to TCG AccelCPUState, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 11/13] accel/tcg: Restrict icount to system emulation, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 12/13] accel/tcg: Move icount fields from CPUState to TCG AccelCPUState, Philippe Mathieu-Daudé, 2024/04/30
- [PATCH v3 13/13] accel/tcg: Move @tb_jmp_cache from CPUState to TCG AccelCPUState,
Philippe Mathieu-Daudé <=
- Re: [PATCH v3 00/13] exec: Rework around CPUState user fields (part 2), Ilya Leoshkevich, 2024/04/30