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RE: [PATCH v3] Hexagon: add PC alignment check and exception
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From: |
Brian Cain |
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Subject: |
RE: [PATCH v3] Hexagon: add PC alignment check and exception |
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Date: |
Tue, 30 Apr 2024 18:31:58 +0000 |
> -----Original Message-----
> From: Richard Henderson <richard.henderson@linaro.org>
> Sent: Tuesday, April 30, 2024 10:53 AM
> To: Matheus Bernardino (QUIC) <quic_mathbern@quicinc.com>; qemu-
> devel@nongnu.org
> Cc: Brian Cain <bcain@quicinc.com>; Sid Manning <sidneym@quicinc.com>;
> ale@rev.ng; anjo@rev.ng; ltaylorsimpson@gmail.com; Laurent Vivier
> <laurent@vivier.eu>
> Subject: Re: [PATCH v3] Hexagon: add PC alignment check and exception
>
> WARNING: This email originated from outside of Qualcomm. Please be wary of
> any links or attachments, and do not enable macros.
>
> On 4/30/24 07:25, Matheus Tavares Bernardino wrote:
> > +void test_multi_cof(void)
> > +{
> > + asm volatile(
> > + "p0 = cmp.eq(r0, r0)\n"
> > + "{\n"
> > + " if (p0) jump test_multi_cof_unaligned\n"
> > + " jump 1f\n"
> > + "}\n"
> > + "1: nop\n"
> > + : : : "p0");
> > +}
>
> I will say you could just add the label to the end of the asm here, like
>
> .byte 0
> test_multi_cof_unaligned:
>
> rather than use a separate source file.
Agreed: that would simplify this test case definition and the patch a bit.
-Brian