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| From: | Richard Henderson |
| Subject: | Re: [PATCH 04/18] bsd-user: Implement RISC-V TLS register setup |
| Date: | Fri, 2 Aug 2024 23:01:58 +1000 |
| User-agent: | Mozilla Thunderbird |
On 8/2/24 18:34, Ajeet Singh wrote:
From: Mark Corbin<mark.corbin@embecsom.com> Added the 'target_cpu_set_tls' function to handle setting the Thread Local Storage (TLS) register for the RISC-V architecture. Signed-off-by: Mark Corbin<mark.corbin@embecsom.com> Signed-off-by: Ajeet Singh<itachis@FreeBSD.org> --- bsd-user/riscv/target_arch_cpu.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 bsd-user/riscv/target_arch_cpu.c
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
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