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[PATCH v2 10/11] aspeed: add tmp105 in i2c bus 0 for AST2700
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From: |
Jamin Lin |
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Subject: |
[PATCH v2 10/11] aspeed: add tmp105 in i2c bus 0 for AST2700 |
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Date: |
Thu, 8 Aug 2024 10:49:15 +0800 |
ASPEED SDK add lm75 in i2c bus 0 for AST2700.
LM75 is compatible with TMP105 driver.
Introduce a new i2c init function and
add tmp105 device model in i2c bus 0.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index fd5603f7aa..3d13b16768 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1650,6 +1650,15 @@ static void
aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
}
#ifdef TARGET_AARCH64
+static void ast2700_evb_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ /* LM75 is compatible with TMP105 driver */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0),
+ TYPE_TMP105, 0x4d);
+}
+
static void aspeed_machine_ast2700_evb_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -1664,6 +1673,7 @@ static void
aspeed_machine_ast2700_evb_class_init(ObjectClass *oc, void *data)
amc->num_cs = 2;
amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
amc->uart_default = ASPEED_DEV_UART12;
+ amc->i2c_init = ast2700_evb_i2c_init;
mc->default_ram_size = 1 * GiB;
aspeed_machine_class_init_cpus_defaults(mc);
}
--
2.34.1
- [PATCH v2 00/11] support I2C for AST2700, Jamin Lin, 2024/08/07
- [PATCH v2 01/11] hw/i2c/aspeed: support discontinuous register memory region of I2C bus, Jamin Lin, 2024/08/07
- [PATCH v2 02/11] hw/i2c/aspeed: introduce a new bus pool buffer attribute in AspeedI2Cbus, Jamin Lin, 2024/08/07
- [PATCH v2 03/11] hw/i2c/aspeed: support discontinuous poll buffer memory region of I2C bus, Jamin Lin, 2024/08/07
- [PATCH v2 04/11] hw/i2c/aspeed: introduce a new dma_dram_offset attribute in AspeedI2Cbus, Jamin Lin, 2024/08/07
- [PATCH v2 05/11] hw/i2c/aspeed: Add AST2700 support, Jamin Lin, 2024/08/07
- [PATCH v2 06/11] hw/i2c/aspeed: support Tx/Rx buffer 64 bits address, Jamin Lin, 2024/08/07
- [PATCH v2 07/11] hw/i2c/aspeed: support high part dram offset for DMA 64 bits, Jamin Lin, 2024/08/07
- [PATCH v2 08/11] aspeed/soc: introduce a new API to get the INTC orgate information, Jamin Lin, 2024/08/07
- [PATCH v2 09/11] aspeed/soc: support I2C for AST2700, Jamin Lin, 2024/08/07
- [PATCH v2 10/11] aspeed: add tmp105 in i2c bus 0 for AST2700,
Jamin Lin <=
- [PATCH v2 11/11] machine_aspeed.py: update to test I2C for AST2700, Jamin Lin, 2024/08/07