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[PATCH v2 11/11] machine_aspeed.py: update to test I2C for AST2700
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From: |
Jamin Lin |
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Subject: |
[PATCH v2 11/11] machine_aspeed.py: update to test I2C for AST2700 |
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Date: |
Thu, 8 Aug 2024 10:49:16 +0800 |
Update test case to test lm75 temperature sensor.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/avocado/machine_aspeed.py | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/tests/avocado/machine_aspeed.py b/tests/avocado/machine_aspeed.py
index f8e263d37e..6935f5f57c 100644
--- a/tests/avocado/machine_aspeed.py
+++ b/tests/avocado/machine_aspeed.py
@@ -435,9 +435,25 @@ def test_aarch64_ast2700_evb_sdk_v09_02(self):
f'loader,addr=0x430000000,cpu-num={i}')
self.vm.add_args('-smp', str(num_cpu))
+ self.vm.add_args('-device',
+
'tmp105,bus=aspeed.i2c.bus.1,address=0x4d,id=tmp-test')
self.do_test_aarch64_aspeed_sdk_start(image_dir + 'image-bmc')
self.wait_for_console_pattern('nodistro.0 ast2700-default ttyS12')
+
self.ssh_connect('root', '0penBmc', False)
+ self.ssh_command('dmesg -c > /dev/null')
+
+ self.ssh_command_output_contains(
+ 'echo lm75 0x4d > /sys/class/i2c-dev/i2c-1/device/new_device '
+ '&& dmesg -c',
+ 'i2c i2c-1: new_device: Instantiated device lm75 at 0x4d');
+
+ self.ssh_command_output_contains(
+ 'cat /sys/class/hwmon/hwmon20/temp1_input', '0')
+ self.vm.cmd('qom-set', path='/machine/peripheral/tmp-test',
+ property='temperature', value=18000)
+ self.ssh_command_output_contains(
+ 'cat /sys/class/hwmon/hwmon20/temp1_input', '18000')
class AST2x00MachineMMC(QemuSystemTest):
--
2.34.1
- [PATCH v2 01/11] hw/i2c/aspeed: support discontinuous register memory region of I2C bus, (continued)
- [PATCH v2 01/11] hw/i2c/aspeed: support discontinuous register memory region of I2C bus, Jamin Lin, 2024/08/07
- [PATCH v2 02/11] hw/i2c/aspeed: introduce a new bus pool buffer attribute in AspeedI2Cbus, Jamin Lin, 2024/08/07
- [PATCH v2 03/11] hw/i2c/aspeed: support discontinuous poll buffer memory region of I2C bus, Jamin Lin, 2024/08/07
- [PATCH v2 04/11] hw/i2c/aspeed: introduce a new dma_dram_offset attribute in AspeedI2Cbus, Jamin Lin, 2024/08/07
- [PATCH v2 05/11] hw/i2c/aspeed: Add AST2700 support, Jamin Lin, 2024/08/07
- [PATCH v2 06/11] hw/i2c/aspeed: support Tx/Rx buffer 64 bits address, Jamin Lin, 2024/08/07
- [PATCH v2 07/11] hw/i2c/aspeed: support high part dram offset for DMA 64 bits, Jamin Lin, 2024/08/07
- [PATCH v2 08/11] aspeed/soc: introduce a new API to get the INTC orgate information, Jamin Lin, 2024/08/07
- [PATCH v2 09/11] aspeed/soc: support I2C for AST2700, Jamin Lin, 2024/08/07
- [PATCH v2 10/11] aspeed: add tmp105 in i2c bus 0 for AST2700, Jamin Lin, 2024/08/07
- [PATCH v2 11/11] machine_aspeed.py: update to test I2C for AST2700,
Jamin Lin <=