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Re: [PATCH v2 3/3] hw/net: xilinx_axienet: Fix DMA RX IRQ if ethernet di
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH v2 3/3] hw/net: xilinx_axienet: Fix DMA RX IRQ if ethernet disable RX |
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Date: |
Thu, 8 Aug 2024 14:35:34 +0100 |
On Thu, 1 Aug 2024 at 15:08, Jim Shu <jim.shu@sifive.com> wrote:
>
> When AXI ethernet RX is disabled, it shouldn't send packets to AXI DMA,
> which may let AXI DMA to send RX full IRQs. It is aligned with real AXI
> DMA/ethernet IP behavior in the FPGA.
>
> Also, now ethernet RX blocks the RX packets when it is disabled. It
> should send and clear the remaining RX packets when enabling it.
>
> Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM