Re: [PATCH for-9.1] target/i386: Fix tss access size in switch_tss_ra

[Peter Maydell]

On Mon, 19 Aug 2024 at 08:42, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The two limit_max variables represent size - 1, just like the
> encoding in the GDT, thus the 'old' access was off by one.
> Access the minimal size of the new tss: the complete tss contains
> the iopb, which may be a larger block than the access api expects,
> and irrelevant because the iopb is not accessed during the
> switch itself.
>
> Fixes: 8b131065080a ("target/i386/tcg: use X86Access for TSS access")
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2511
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/i386/tcg/seg_helper.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)

Not an x86 expert but this looks OK based on
description and what we were doing before 8b131065080a...

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM