Re: [PATCH v12 11/20] target/riscv: introduce ssp and enabling controls for zicfiss

[Richard Henderson]

On 8/30/24 09:34, Deepak Gupta wrote:
> +bool cpu_get_bcfien(CPURISCVState *env)

It occurs to me that a better name would be "cpu_get_sspen".
The backward cfi is merely a consequence of the shadow stack.

> +{
> +    /* no cfi extension, return false */
> +    if (!env_archcpu(env)->cfg.ext_zicfiss) {
> +        return false;
> +    }
> +
> +    switch (env->priv) {
> +    case PRV_U:
> +        if (riscv_has_ext(env, RVS)) {
> +            return env->senvcfg & SENVCFG_SSE;
> +        }
> +        return env->menvcfg & MENVCFG_SSE;
> +#ifndef CONFIG_USER_ONLY
> +    case PRV_S:
> +        if (env->virt_enabled) {
> +            return env->henvcfg & HENVCFG_SSE;
> +        }
> +        return env->menvcfg & MENVCFG_SSE;
> +    case PRV_M: /* M-mode shadow stack is always on if hart implements */
> +        return true;

From the manual:

Activating Zicfiss in M-mode is currently not supported. Additionally, when 
S-mode is not
implemented, activation in U-mode is also not supported.

So two of the cases above are wrong.


r~