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[Qemu-ppc] [PATCH 00/10] Make -cpu e500mc useful in TCG v3

From: Alexander Graf
Subject: [Qemu-ppc] [PATCH 00/10] Make -cpu e500mc useful in TCG v3
Date: Wed, 25 Jan 2012 18:27:28 +0100

Thanks to Scott we now have an e500mc CPU description that works great with
KVM, but I have a personal dislike against targets that don't work emulated,
since their test coverage will be very low.

So this patch set implements TCG emulation for -cpu e500mc. I tested that it
works as expected against a recent Linux kernel. Everything looks smooth!

To use it, compile your kernel for an MPC8544DS board with e500mc CPU enabled.

v1 -> v2:

  - rename msync to msync_4xx
  - add preliminary TLBnPS handling
  - use mav 2.0 prepared code
  - raise exception on invalid page size
  - remove sas/ts check
  - isize is only valid for mav 2.0
  - drop SPE IVOR for e500mc

v2 -> v3:

  - move tlbilx variants into their own helpers
  - check validity before writing tlb
  - new patch: PPC: booke206: Check for TLB overrun
  - new patch: PPC: booke206: move avail check to tlbwe

Alexander Graf (10):
  PPC: Add IVOR 38-42
  PPC: e500mc: add missing IVORs to bitmap
  PPC: e500: msync is 440 only, e500 has real sync
  PPC: rename msync to msync_4xx
  PPC: booke206: allow NULL raddr in ppcmas_tlb_check
  PPC: booke: add tlbnps handling
  PPC: booke206: Check for min/max TLB entry size
  PPC: booke206: Implement tlbilx
  PPC: booke206: Check for TLB overrun
  PPC: booke206: move avail check to tlbwe

 target-ppc/cpu.h            |   34 ++++++++++++++
 target-ppc/helper.c         |   16 +++---
 target-ppc/helper.h         |    3 +
 target-ppc/op_helper.c      |  106 ++++++++++++++++++++++++++++++++++++++++++-
 target-ppc/translate.c      |   41 +++++++++++++++-
 target-ppc/translate_init.c |   41 +++++++++-------
 6 files changed, 211 insertions(+), 30 deletions(-)

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