Re: [Qemu-ppc] [PULL 00/58] ppc patch queue 2013-03-22

[Aurélien Jarno]

On Fri, Mar 22, 2013 at 03:28:34PM +0100, Alexander Graf wrote:
> Hi Blue / Aurelien,
> 
> This is my current patch queue for ppc.  Please pull.
> 
> Alex
> 
> 
> The following changes since commit afed26082219b49443193b4ac32d113bbcf967fd:
>   Edgar E. Iglesias (1):
>         microblaze: Ignore non-cpu accesses to unmapped areas
> 
> are available in the git repository at:
> 
>   git://github.com/agraf/qemu.git ppc-for-upstream
> 
> David Gibson (52):
>       pseries: Fix breakage in CPU QOM conversion
>       pseries: Remove "busname" property for PCI host bridge
>       target-ppc: Remove CONFIG_PSERIES dependency in kvm.c
>       pseries: Move XICS initialization before cpu initialization
>       target-ppc: Remove vestigial PowerPC 620 support
>       target-ppc: Trivial cleanups in mmu_helper.c
>       target-ppc: Remove address check for logging
>       target-ppc: Move SLB handling into a mmu-hash64.c
>       target-ppc: Disentangle pte_check()
>       target-ppc: Disentangle find_pte()
>       target-ppc: Disentangle get_segment()
>       target-ppc: Rework get_physical_address()
>       target-ppc: Disentangle get_physical_address() paths
>       target-ppc: Disentangle hash mmu paths for cpu_ppc_handle_mmu_fault
>       target-ppc: Disentangle hash mmu versions of cpu_get_phys_page_debug()
>       target-ppc: Disentangle hash mmu helper functions
>       target-ppc: Don't share get_pteg_offset() between 32 and 64-bit
>       target-ppc: Disentangle BAT code for 32-bit hash MMUs
>       target-ppc: mmu_ctx_t should not be a global type
>       mmu-hash*: Add header file for definitions
>       mmu-hash*: Add hash pte load/store helpers
>       mmu-hash*: Reduce use of access_type
>       mmu-hash64: Remove nx from mmu_ctx_hash64
>       mmu-hash*: Remove eaddr field from mmu_ctx_hash{32, 64}
>       mmu-hash*: Combine ppc_hash{32, 64}_get_physical_address and 
> get_segment{32, 64}()
>       mmu-hash32: Split out handling of direct store segments
>       mmu-hash32: Split direct store segment handling into a helper
>       mmu-hash*: Cleanup segment-level NX check
>       mmu-hash*: Don't keep looking for PTEs after we find a match
>       mmu-hash*: Separate PTEG searching from permissions checking
>       mmu-hash*: Make find_pte{32, 64} do more of the job of finding ptes
>       mmu-hash*: Remove permission checking from find_pte{32, 64}()
>       mmu-hash64: Clean up ppc_hash64_htab_lookup()
>       mmu-hash*: Fold pte_check*() logic into caller
>       mmu-hash32: Remove odd pointer usage from BAT code
>       mmu-hash32: Split BAT size logic from permissions logic
>       mmu-hash32: Clean up BAT matching logic
>       mmu-hash32: Cleanup BAT lookup
>       mmu-hash32: Don't look up page tables on BAT permission error
>       mmu-hash*: Don't update PTE flags when permission is denied
>       mmu-hash32: Remove nx from context structure
>       mmu-hash*: Clean up permission checking
>       mmu-hash64: Factor SLB N bit into permissions bits
>       mmu-hash*: Clean up PTE flags update
>       mmu-hash*: Clean up real address calculation
>       mmu-hash*: Correctly mask RPN from hash PTE
>       mmu-hash*: Don't use full ppc_hash{32, 64}_translate() path for 
> get_phys_page_debug()
>       mmu-hash*: Merge translate and fault handling functions
>       mmu-hash64: Implement Virtual Page Class Key Protection
>       target-ppc: Split user only code out of mmu_helper.c
>       target-ppc: Move ppc tlb_fill implementation into mmu_helper.c
>       target-ppc: Use QOM method dispatch for MMU fault handling
> 
> Fabien Chouteau (1):
>       PPC/GDB: handle read and write of fpscr
> 
> Richard Henderson (5):
>       target-ppc: Fix add and subf carry generation in narrow mode
>       target-ppc: Use NARROW_MODE macro for branches
>       target-ppc: Use NARROW_MODE macro for comparisons
>       target-ppc: Use NARROW_MODE macro for addresses
>       target-ppc: Use NARROW_MODE macro for tlbie
> 
>  gdbstub.c                     |    3 +-
>  hw/ppc/spapr.c                |   16 +-
>  hw/ppc/spapr_hcall.c          |  102 ++----
>  hw/ppc/xics.c                 |   57 ++--
>  hw/spapr_pci.c                |   30 ++-
>  hw/spapr_pci.h                |    4 +-
>  hw/xics.h                     |    3 +-
>  monitor.c                     |    4 -
>  target-ppc/Makefile.objs      |    7 +-
>  target-ppc/cpu-models.c       |    2 +-
>  target-ppc/cpu-qom.h          |    4 +
>  target-ppc/cpu.h              |   91 +----
>  target-ppc/fpu_helper.c       |    5 +
>  target-ppc/helper.h           |    1 -
>  target-ppc/kvm.c              |    3 +-
>  target-ppc/machine.c          |    4 +-
>  target-ppc/mem_helper.c       |   38 --
>  target-ppc/misc_helper.c      |    6 -
>  target-ppc/mmu-hash32.c       |  560 +++++++++++++++++++++++++++
>  target-ppc/mmu-hash32.h       |  102 +++++
>  target-ppc/mmu-hash64.c       |  546 +++++++++++++++++++++++++++
>  target-ppc/mmu-hash64.h       |  124 ++++++
>  target-ppc/mmu_helper.c       |  835 
> ++++++++---------------------------------
>  target-ppc/translate.c        |  226 ++++++------
>  target-ppc/translate_init.c   |  360 +++++-------------
>  target-ppc/user_only_helper.c |   44 +++
>  26 files changed, 1873 insertions(+), 1304 deletions(-)
>  create mode 100644 target-ppc/mmu-hash32.c
>  create mode 100644 target-ppc/mmu-hash32.h
>  create mode 100644 target-ppc/mmu-hash64.c
>  create mode 100644 target-ppc/mmu-hash64.h
>  create mode 100644 target-ppc/user_only_helper.c
> 

Thanks, pulled.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net