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Re: [Qemu-ppc] [Qemu-devel] Incorrect handling of more PPC64 insns (PATC

From: Torbjorn Granlund
Subject: Re: [Qemu-ppc] [Qemu-devel] Incorrect handling of more PPC64 insns (PATCH)
Date: Wed, 08 May 2013 11:20:48 +0200
User-agent: Gnus/5.11 (Gnus v5.11) Emacs/22.3 (berkeley-unix)

Aurelien Jarno <address@hidden> writes:

  64-bit CPUs check for the L bit of comparison instruction to determine
  if the instruction is 32-bit wide, and not to the MSR SF bit.
  L=1 on a 32-bit CPU should generate an invalid instruction exception.
No.  See my previous post.

The L bit is to be ignored for 32-bit CPUs, just like the original code


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