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Re: [Qemu-ppc] [Qemu-devel] [PATCH v2 10/14] pci: allow 0 address for PC

From: Peter Maydell
Subject: Re: [Qemu-ppc] [Qemu-devel] [PATCH v2 10/14] pci: allow 0 address for PCI IO regions
Date: Tue, 10 Dec 2013 22:14:18 +0000

On 10 December 2013 21:42, Michael Roth <address@hidden> wrote:
> Quoting Peter Maydell (2013-12-05 17:33:48)
>> And presumably whoever put that specific check for 0 into
>> QEMU had a reason for it.
>> On the other hand I can't now find whatever document it was
>> that I was reading that claimed 0 wasn't valid :-(
> Can't seem to find anything either, checked the 2.3 spec as well. I tried to
> look up the git history for the new_addr == 0 check but unfortunately it 
> seemed
> to be part of the initial check-in.
> The only clue I've found regarding special-casing for a 0-bar is this:
> "Power-up software can determine how much address space the device requires by
> writing a value of all 1's to the register and then reading the value back. 
> The
> device will return 0's in all don't-care address bits, effectively specifying
> the address space required. Unimplemented Base Address registers are hardwired
> to zero." - PCI 3.0,

Googling again brought up this mailing list thread:


which includes what is supposedly a quote from the PCI 2.1 spec:

# "Note: A Base Address register does not contain a valid
# address when it is equal to "0""

(I don't have access to the 2.1 version to check.)

This text seems to have been removed from the 2.2 spec.

-- PMM

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