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Re: [Qemu-ppc] [Qemu-devel] [V4 PATCH 17/22] target-ppc: Fix and enable

From: Alexander Graf
Subject: Re: [Qemu-ppc] [Qemu-devel] [V4 PATCH 17/22] target-ppc: Fix and enable fri[mnpz]
Date: Fri, 21 Feb 2014 12:58:55 +0100

On 08.01.2014, at 19:32, Richard Henderson <address@hidden> wrote:

> On 01/07/2014 08:06 AM, Tom Musta wrote:
>> The fri* series of instructions was introduced prior to ISA 2.06 and
>> is supported on Power7 and Power8 hardware.  However, the instruction
>> is still considered illegal in the P7 and P8 QEMU emulation models.
>> This patch enables these instructions for the P7 and P8 machines.
>> Also, the existing helper is modified to correctly handle some of
>> the boundary cases (NaNs and the inexact flag).
>> Signed-off-by: Tom Musta <address@hidden>
>> ---
>> V4: frin changed to use "ties away" rounding mode per Richard Henderson's
>> review.  Modified NaN handling.  Proper handling of stickiness of
>> the inexact flag.  Added to P7+ model.
>> target-ppc/fpu_helper.c     |   18 +++++++++++-------
>> target-ppc/translate_init.c |    3 +++
>> 2 files changed, 14 insertions(+), 7 deletions(-)
> Reviewed-by: Richard Henderson <address@hidden>

This patch (among others) spawn warnings about constants that are defined "ul" 
on 32bit hosts:


Tom, please follow up with a patch fixing all of these in target-ppc.


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