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Re: [Qemu-ppc] [Qemu-devel] [PATCH 26/28] target-ppc: Altivec 2.07: AES
From: |
Tom Musta |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH 26/28] target-ppc: Altivec 2.07: AES Instructions |
Date: |
Wed, 26 Feb 2014 13:22:49 -0600 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.3.0 |
On 2/24/2014 11:59 AM, Richard Henderson wrote:
> On 02/12/2014 01:23 PM, Tom Musta wrote:
>> +static uint8_t SBOX[256] = {
>
> I'm not keen on yet another copy of AES data.
>
> Please reuse "qemu/aes.h" as much as possible. Please see how we use those in
> target-i386; from a quick reading, these insns should match up:
>
> aesenc vcipher
> aesenclast vcipherlast
> aesdec vncipher
> aesdeclast vncipherlast
>
> It does look like the aes_shifts/aes_ishifts arrays should be moved from i386
> specific code. Which would also be good since ops_sse.h is included multiple
> times and thus we have unnecessary multiple copies of this data.
>
> There's more data that should be moved out to common code in
> target-arm/crypto_helper.c. The most pertinent of which is a copy of your
> SBOX
> and InvSBOX arrays, which you'll still need for the vsbox insn.
>
> I'll also note that arm contains a second copy of the aes_{i,}shifts arrays.
> So after those are moved to common code, we avoid that duplication too.
>
>
> r~
>
Richard,
Thanks for the feedback ... this is a good suggestion.
I see one problem with the PowerPC vncipher instruction. This instruction is
not equivalent the aesdec. Moreover, the AddRoundKey (XOR) is performed
*before*
applying the InvMixColumns operation. So the AES_Te4 mapping is not correct
for PPC.
- [Qemu-ppc] [PATCH 22/28] target-ppc: Altivec 2.07: Doubleword Compares, (continued)
- [Qemu-ppc] [PATCH 22/28] target-ppc: Altivec 2.07: Doubleword Compares, Tom Musta, 2014/02/12
- [Qemu-ppc] [PATCH 23/28] target-ppc: Altivec 2.07: Vector Gather Bits by Bytes, Tom Musta, 2014/02/12
- [Qemu-ppc] [PATCH 24/28] target-ppc: Altivec 2.07: Vector Polynomial Multiply Sum, Tom Musta, 2014/02/12
- [Qemu-ppc] [PATCH 25/28] target-ppc: Altivec 2.07: Binary Coded Decimal Instructions, Tom Musta, 2014/02/12
- [Qemu-ppc] [PATCH 26/28] target-ppc: Altivec 2.07: AES Instructions, Tom Musta, 2014/02/12
[Qemu-ppc] [PATCH 27/28] target-ppc: Altivec 2.07: Vector SHA Sigma Instructions, Tom Musta, 2014/02/12
[Qemu-ppc] [PATCH 28/28] target-ppc: Altivec 2.07: Vector Permute and Exclusive OR, Tom Musta, 2014/02/12
[Qemu-ppc] [PATCH 19/28] target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift Instructions, Tom Musta, 2014/02/12
[Qemu-ppc] [PATCH 18/28] target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and Shifts, Tom Musta, 2014/02/12
Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Richard W.M. Jones, 2014/02/18