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[Qemu-ppc] [PATCH 00/12] ppc: preparing pnv landing (round 2)

From: Cédric Le Goater
Subject: [Qemu-ppc] [PATCH 00/12] ppc: preparing pnv landing (round 2)
Date: Tue, 3 May 2016 18:03:22 +0200


Here is a new set of fixes extracted from Ben's PowerNV tree :


It was quickly tested with a pseries guest using KVM and TCG.



Benjamin Herrenschmidt (11):
  ppc: Remove MMU_MODEn_SUFFIX definitions
  ppc: Use split I/D mmu modes to avoid flushes on interrupts
  ppc: Do some batching of TCG tlb flushes
  ppc: Add a bunch of hypervisor SPRs to Book3s
  ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV
  ppc: Fix rfi/rfid/hrfi/... emulation
  ppc: Better figure out if processor has HV mode
  ppc: tlbie, tlbia and tlbisync are HV only
  ppc: Change 'invalid' bit mask of tlbiel and tlbie
  ppc: Get out of emulation on SMT "OR" ops
  ppc: Add PPC_64H instruction flag to POWER7 and POWER8

Michael Neuling (1):
  ppc: Fix sign extension issue in mtmsr(d) emulation

 hw/ppc/spapr_hcall.c        |  14 ++++-
 target-ppc/cpu.h            |  20 ++++--
 target-ppc/excp_helper.c    |  77 +++++++++++------------
 target-ppc/helper.h         |   1 +
 target-ppc/helper_regs.h    |  71 +++++++++++++++++++---
 target-ppc/machine.c        |   5 +-
 target-ppc/mmu-hash64.c     |  11 +---
 target-ppc/mmu_helper.c     |   9 ++-
 target-ppc/translate.c      |  94 +++++++++++++++++++++++------
 target-ppc/translate_init.c | 144 +++++++++++++++++++++++++++++++++++++++++---
 10 files changed, 348 insertions(+), 98 deletions(-)


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