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[Qemu-ppc] [PULL 41/64] ppc: Don't set access_type on all load/stores on
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 41/64] ppc: Don't set access_type on all load/stores on hash64 |
Date: |
Wed, 7 Sep 2016 20:29:20 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
We don't use it so let's not generate the updates.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index bc5b2ee..5986435 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -195,6 +195,7 @@ struct DisasContext {
/* Routine used to access memory */
bool pr, hv, dr, le_mode;
bool lazy_tlb_flush;
+ bool need_access_type;
int mem_idx;
int access_type;
/* Translation flags */
@@ -252,7 +253,7 @@ struct opc_handler_t {
static inline void gen_set_access_type(DisasContext *ctx, int access_type)
{
- if (ctx->access_type != access_type) {
+ if (ctx->need_access_type && ctx->access_type != access_type) {
tcg_gen_movi_i32(cpu_access_type, access_type);
ctx->access_type = access_type;
}
@@ -6927,6 +6928,7 @@ void gen_intermediate_code(CPUPPCState *env, struct
TranslationBlock *tb)
ctx.insns_flags = env->insns_flags;
ctx.insns_flags2 = env->insns_flags2;
ctx.access_type = -1;
+ ctx.need_access_type = !(env->mmu_model & POWERPC_MMU_64B);
ctx.le_mode = !!(env->hflags & (1 << MSR_LE));
ctx.default_tcg_memop_mask = ctx.le_mode ? MO_LE : MO_BE;
#if defined(TARGET_PPC64)
--
2.7.4
- [Qemu-ppc] [PULL 02/64] hw/ppc: include fdt helper routine in a common file, (continued)
- [Qemu-ppc] [PULL 02/64] hw/ppc: include fdt helper routine in a common file, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 15/64] target-ppc: introduce opc4 for Expanded Opcode, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 12/64] target-ppc: add setb instruction, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 16/64] ppc: Provide basic raise_exception_* functions, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 33/64] ppc: Don't update NIP BookE 2.06 tlbwe, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 26/64] ppc: FP exceptions are always precise, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 31/64] ppc: Don't update NIP in DCR access routines, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 50/64] target-ppc: add vsrv instruction, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 37/64] ppc: Make alignment exceptions suck less, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 13/64] target-ppc: add maddld instruction, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 41/64] ppc: Don't set access_type on all load/stores on hash64,
David Gibson <=
- [Qemu-ppc] [PULL 55/64] ppc: Fix macio ESCC legacy mapping, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 44/64] target-ppc: implement branch-less divw[o][.], David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 27/64] ppc: Don't update NIP in lswi/lswx/stswi/stswx, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 39/64] ppc: Speed up dcbz, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 58/64] ppc: Don't generate dead code on unconditional branches, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 62/64] spapr: implement H_CHANGE_LOGICAL_LAN_MAC h_call, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 45/64] target-ppc: implement branch-less divd[o][.], David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 32/64] ppc: Don't update NIP in facility unavailable interrupts, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 08/64] target-ppc: add modulo dword operations, David Gibson, 2016/09/07
- [Qemu-ppc] [PULL 34/64] ppc: Don't update NIP on conditional trap instructions, David Gibson, 2016/09/07