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[Qemu-ppc] [PULL 011/107] target-ppc: Implement bcdctsq. instruction
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 011/107] target-ppc: Implement bcdctsq. instruction |
Date: |
Thu, 2 Feb 2017 16:13:09 +1100 |
From: Jose Ricardo Ziviani <address@hidden>
bcdctsq.: Decimal convert to signed quadword. It is possible to
convert packed decimal values to signed quadwords.
Signed-off-by: Jose Ricardo Ziviani <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/helper.h | 1 +
target/ppc/int_helper.c | 40 +++++++++++++++++++++++++++++++++++++
target/ppc/translate/vmx-impl.inc.c | 7 +++++++
3 files changed, 48 insertions(+)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index ec5ccbe..daf5a6e 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -378,6 +378,7 @@ DEF_HELPER_3(bcdctn, i32, avr, avr, i32)
DEF_HELPER_3(bcdcfz, i32, avr, avr, i32)
DEF_HELPER_3(bcdctz, i32, avr, avr, i32)
DEF_HELPER_3(bcdcfsq, i32, avr, avr, i32)
+DEF_HELPER_3(bcdctsq, i32, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index a809482..fa7cfdd 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2880,6 +2880,46 @@ uint32_t helper_bcdcfsq(ppc_avr_t *r, ppc_avr_t *b,
uint32_t ps)
return cr;
}
+uint32_t helper_bcdctsq(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
+{
+ uint8_t i;
+ int cr;
+ uint64_t carry;
+ uint64_t unused;
+ uint64_t lo_value;
+ uint64_t hi_value = 0;
+ int sgnb = bcd_get_sgn(b);
+ int invalid = (sgnb == 0);
+
+ lo_value = bcd_get_digit(b, 31, &invalid);
+ for (i = 30; i > 0; i--) {
+ mulu64(&lo_value, &carry, lo_value, 10ULL);
+ mulu64(&hi_value, &unused, hi_value, 10ULL);
+ lo_value += bcd_get_digit(b, i, &invalid);
+ hi_value += carry;
+
+ if (unlikely(invalid)) {
+ break;
+ }
+ }
+
+ if (sgnb == -1) {
+ r->s64[LO_IDX] = -lo_value;
+ r->s64[HI_IDX] = ~hi_value + !r->s64[LO_IDX];
+ } else {
+ r->s64[LO_IDX] = lo_value;
+ r->s64[HI_IDX] = hi_value;
+ }
+
+ cr = bcd_cmp_zero(b);
+
+ if (unlikely(invalid)) {
+ cr = CRF_SO;
+ }
+
+ return cr;
+}
+
void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
{
int i;
diff --git a/target/ppc/translate/vmx-impl.inc.c
b/target/ppc/translate/vmx-impl.inc.c
index 36141e5..1579b58 100644
--- a/target/ppc/translate/vmx-impl.inc.c
+++ b/target/ppc/translate/vmx-impl.inc.c
@@ -990,10 +990,14 @@ GEN_BCD2(bcdctn)
GEN_BCD2(bcdcfz)
GEN_BCD2(bcdctz)
GEN_BCD2(bcdcfsq)
+GEN_BCD2(bcdctsq)
static void gen_xpnd04_1(DisasContext *ctx)
{
switch (opc4(ctx->opcode)) {
+ case 0:
+ gen_bcdctsq(ctx);
+ break;
case 2:
gen_bcdcfsq(ctx);
break;
@@ -1018,6 +1022,9 @@ static void gen_xpnd04_1(DisasContext *ctx)
static void gen_xpnd04_2(DisasContext *ctx)
{
switch (opc4(ctx->opcode)) {
+ case 0:
+ gen_bcdctsq(ctx);
+ break;
case 2:
gen_bcdcfsq(ctx);
break;
--
2.9.3
- [Qemu-ppc] [PULL 000/107] ppc-for-2.9 queue 20170202, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 004/107] target-ppc: Fix xscmpodp and xscmpudp instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 007/107] target-ppc: implement lxsd and lxssp instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 001/107] disas/ppc: Fix indefinite articles in comments, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 003/107] target-ppc: rename CRF_* defines as CRF_*_BIT, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 011/107] target-ppc: Implement bcdctsq. instruction,
David Gibson <=
- [Qemu-ppc] [PULL 002/107] target-ppc: Consolidate instruction decode helpers, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 010/107] target-ppc: Implement bcdcfsq. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 006/107] target-ppc: Add xscmpoqp and xscmpuqp instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 008/107] target-ppc: implement stxsd and stxssp, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 020/107] target-ppc: move ppc_vsr_t to common header, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 014/107] target-ppc: add vextu[bhw][lr]x instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 005/107] target-ppc: Add xscmpexp[dp, qp] instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 021/107] target-ppc: implement stop instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 016/107] pseries: Make cpu_update during CAS unconditional, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 018/107] ppc: Rename cpu_version to compat_pvr, David Gibson, 2017/02/02