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Re: [Qemu-ppc] [RFC NO-MERGE 12/12] target/ppc: Set ISA 3.00 radix and h
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [RFC NO-MERGE 12/12] target/ppc: Set ISA 3.00 radix and hash bits in OV5 |
Date: |
Mon, 20 Feb 2017 14:17:45 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Fri, Feb 17, 2017 at 04:08:12PM +1100, Suraj Jitindar Singh wrote:
> The OV5 vector (option vector 5) of the chosen node is used by the host
> to tell the guest about which features it supports from those which were
> requested during CAS (client architecture support - the features the guest
> claims support for).
>
> Byte 24 of OV5 is used to show support for in memory tables (radix and/or
> hash), segmentation (SLB or segment tables) and guest translation shoot
> down (the ability of the guest to invalidate translation caches via either
> H_CALLS or by using the appropriate instructions directly).
>
> We (tcg at least) have support for H_REGISTER_PROC_TBL and thus can
> support new hash and radix (bits 0 and 1 in byte 24 respectively), we don't
> support segment tables and so don't set bit 2 or 3 to indicate that
> segmentation must be via the SLB, and set bit 4 to indicate that the guest
> can use shootdown instructions directly.
>
> Signed-off-by: Suraj Jitindar Singh <address@hidden>
Looks fine, but could be obsoleted by all the CAS spec confusion.
> ---
> hw/ppc/spapr.c | 3 +++
> include/hw/ppc/spapr_ovec.h | 3 +++
> 2 files changed, 6 insertions(+)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 55e8c81..3ef9dc4 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -1951,6 +1951,9 @@ static void ppc_spapr_init(MachineState *machine)
> }
>
> spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY);
> + spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX); /* We Support ISAv3 Radix
> Mode */
> + spapr_ovec_set(spapr->ov5, OV5_MMU_HASH); /* We Support ISAv3 Hash Mode
> */
> + spapr_ovec_set(spapr->ov5, OV5_SHOOTDOWN); /* We Support GTSE */
>
> /* advertise support for dedicated HP event source to guests */
> if (spapr->use_hotplug_event_source) {
> diff --git a/include/hw/ppc/spapr_ovec.h b/include/hw/ppc/spapr_ovec.h
> index 355a344..e414568 100644
> --- a/include/hw/ppc/spapr_ovec.h
> +++ b/include/hw/ppc/spapr_ovec.h
> @@ -47,6 +47,9 @@ typedef struct sPAPROptionVector sPAPROptionVector;
> #define OV5_DRCONF_MEMORY OV_BIT(2, 2)
> #define OV5_FORM1_AFFINITY OV_BIT(5, 0)
> #define OV5_HP_EVT OV_BIT(6, 5)
> +#define OV5_MMU_RADIX OV_BIT(24, 0)
> +#define OV5_MMU_HASH OV_BIT(24, 1)
> +#define OV5_SHOOTDOWN OV_BIT(24, 4)
>
> /* interfaces */
> sPAPROptionVector *spapr_ovec_new(void);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-ppc] [RFC NO-MERGE 08/12] target/ppc: Add POWER9/ISAv3.00 to compat_table, (continued)