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Re: [Qemu-ppc] [PATCH v1 01/10] target/ppc: support for 32-bit carry and
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v1 01/10] target/ppc: support for 32-bit carry and overflow |
Date: |
Wed, 22 Feb 2017 13:27:17 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Tue, Feb 21, 2017 at 10:15:46AM +0530, Nikunj A Dadhania wrote:
> Richard Henderson <address@hidden> writes:
>
> > On 02/20/2017 09:11 PM, Nikunj A Dadhania wrote:
> >> +#ifndef TARGET_PPC64
> >> static inline target_ulong cpu_read_xer(CPUPPCState *env)
> >> {
> >> return env->xer | (env->so << XER_SO) | (env->ov << XER_OV) |
> >> (env->ca << XER_CA);
> >> }
> >> +#else
> >> +static inline target_ulong cpu_read_xer(CPUPPCState *env)
> >> +{
> >> + return env->xer | (env->so << XER_SO) |
> >> + (env->ov << XER_OV) | (env->ca << XER_CA) |
> >> + (env->ov32 << XER_OV32) | (env->ca32 << XER_CA32);
> >> +}
> >> +#endif
> >>
> >> +#ifndef TARGET_PPC64
> >> static inline void cpu_write_xer(CPUPPCState *env, target_ulong xer)
> >> {
> >> env->so = (xer >> XER_SO) & 1;
> >> @@ -2355,6 +2371,20 @@ static inline void cpu_write_xer(CPUPPCState *env,
> >> target_ulong xer)
> >> env->ca = (xer >> XER_CA) & 1;
> >> env->xer = xer & ~((1u << XER_SO) | (1u << XER_OV) | (1u << XER_CA));
> >> }
> >> +#else
> >> +static inline void cpu_write_xer(CPUPPCState *env, target_ulong xer)
> >> +{
> >> + env->so = (xer >> XER_SO) & 1;
> >> + env->ov = (xer >> XER_OV) & 1;
> >> + env->ca = (xer >> XER_CA) & 1;
> >> + env->ov32 = (xer >> XER_OV32) & 1;
> >> + env->ca32 = (xer >> XER_CA32) & 1;
> >> + env->xer = xer & ~((1ul << XER_SO) |
> >> + (1ul << XER_OV) | (1ul << XER_CA) |
> >> + (1ul << XER_OV32) | (1ul << XER_CA32));
> >> +}
> >> +#endif
> >
> > You should probably move both of these out of line now (perhaps cpu.c).
>
> Sure.
>
>
> > You probably don't want to set ov32/ca32 unless the cpu is power9. I
> > assume
> > that if you attempt to set these bits for power8 they are
> > read-as-zero/write-ignore?
>
> Sure, will make it CPU specific.
Right, and given you need a CPU model check anyway, I don't see that
there's any benefit to splitting out the 32-bit build version versus
the 64-bit build version.
> >> @@ -3715,6 +3719,12 @@ static void gen_read_xer(TCGv dst)
> >> tcg_gen_or_tl(t0, t0, t1);
> >> tcg_gen_or_tl(dst, dst, t2);
> >> tcg_gen_or_tl(dst, dst, t0);
> >> +#ifdef TARGET_PPC64
> >> + tcg_gen_shli_tl(t0, cpu_ov32, XER_OV32);
> >> + tcg_gen_or_tl(dst, dst, t0);
> >> + tcg_gen_shli_tl(t0, cpu_ca32, XER_CA32);
> >> + tcg_gen_or_tl(dst, dst, t0);
> >> +#endif
> >> tcg_temp_free(t0);
> >> tcg_temp_free(t1);
> >> tcg_temp_free(t2);
> >> @@ -3727,9 +3737,14 @@ static void gen_write_xer(TCGv src)
> >> tcg_gen_shri_tl(cpu_so, src, XER_SO);
> >> tcg_gen_shri_tl(cpu_ov, src, XER_OV);
> >> tcg_gen_shri_tl(cpu_ca, src, XER_CA);
> >> + tcg_gen_shri_tl(cpu_ov32, src, XER_OV32);
> >> + tcg_gen_shri_tl(cpu_ca32, src, XER_CA32);
> >> tcg_gen_andi_tl(cpu_so, cpu_so, 1);
> >> tcg_gen_andi_tl(cpu_ov, cpu_ov, 1);
> >> tcg_gen_andi_tl(cpu_ca, cpu_ca, 1);
> >> + tcg_gen_andi_tl(cpu_ov32, cpu_ov32, 1);
> >> + tcg_gen_andi_tl(cpu_ca32, cpu_ca32, 1);
> >> +
> >> }
> >
> > Watch the blank lines. No ifdef here on the write side?
>
> Right, will add.
>
> Regards
> Nikunj
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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