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[Qemu-ppc] [PULL 23/23] target/ppc: Avoid printing wrong aliases in CPU
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 23/23] target/ppc: Avoid printing wrong aliases in CPU help text |
Date: |
Thu, 11 May 2017 14:14:26 +1000 |
From: Thomas Huth <address@hidden>
When running with KVM, we update the "family" CPU alias to point
to the right host CPU type, so that it for example possible to
use "-cpu POWER8" on a POWER8NVL host. However, the function for
printing the list of available CPU models is called earlier than
the KVM setup code, so the output of "-cpu help" is wrong in that
case. Since it would be somewhat ugly anyway to have different
help texts depending on whether "-enable-kvm" has been specified
or not, we should better always print the same text, so fix this
issue by printing "alias for preferred XXX CPU" instead.
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/cpu.h | 1 +
target/ppc/kvm.c | 12 ------------
target/ppc/translate_init.c | 27 +++++++++++++++++++++++++--
3 files changed, 26 insertions(+), 14 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index c0f63f6..401e10e 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1225,6 +1225,7 @@ static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState
*env)
PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
+PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc);
struct PPCVirtualHypervisor {
Object parent;
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index cb2cf2b..51249ce 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2424,18 +2424,6 @@ bool kvmppc_has_cap_mmu_hash_v3(void)
return cap_mmu_hash_v3;
}
-static PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc)
-{
- ObjectClass *oc = OBJECT_CLASS(pcc);
-
- while (oc && !object_class_is_abstract(oc)) {
- oc = object_class_get_parent(oc);
- }
- assert(oc);
-
- return POWERPC_CPU_CLASS(oc);
-}
-
PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
{
uint32_t host_pvr = mfpvr();
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index fda30b0..56a0ab2 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -10285,6 +10285,18 @@ PowerPCCPU *cpu_ppc_init(const char *cpu_model)
return POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));
}
+PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc)
+{
+ ObjectClass *oc = OBJECT_CLASS(pcc);
+
+ while (oc && !object_class_is_abstract(oc)) {
+ oc = object_class_get_parent(oc);
+ }
+ assert(oc);
+
+ return POWERPC_CPU_CLASS(oc);
+}
+
/* Sort by PVR, ordering special case "host" last. */
static gint ppc_cpu_list_compare(gconstpointer a, gconstpointer b)
{
@@ -10316,6 +10328,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer
user_data)
ObjectClass *oc = data;
CPUListState *s = user_data;
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
+ DeviceClass *family = DEVICE_CLASS(ppc_cpu_get_family_class(pcc));
const char *typename = object_class_get_name(oc);
char *name;
int i;
@@ -10338,8 +10351,18 @@ static void ppc_cpu_list_entry(gpointer data, gpointer
user_data)
if (alias_oc != oc) {
continue;
}
- (*s->cpu_fprintf)(s->file, "PowerPC %-16s (alias for %s)\n",
- alias->alias, name);
+ /*
+ * If running with KVM, we might update the family alias later, so
+ * avoid printing the wrong alias here and use "preferred" instead
+ */
+ if (strcmp(alias->alias, family->desc) == 0) {
+ (*s->cpu_fprintf)(s->file,
+ "PowerPC %-16s (alias for preferred %s CPU)\n",
+ alias->alias, family->desc);
+ } else {
+ (*s->cpu_fprintf)(s->file, "PowerPC %-16s (alias for %s)\n",
+ alias->alias, name);
+ }
}
g_free(name);
}
--
2.9.3
- [Qemu-ppc] [PULL 21/23] target/ppc: Allow workarounds for POWER9 DD1, (continued)
- [Qemu-ppc] [PULL 21/23] target/ppc: Allow workarounds for POWER9 DD1, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 18/23] target/ppc: Enable RADIX mmu mode for pseries TCG guest, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 13/23] ppc: add qemu_vga.ndrv ROM to fw_cfg interface for NewWorld Macs, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 14/23] target/ppc: Set UPRT and GTSE on all cpus in H_REGISTER_PROCESS_TABLE, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 17/23] target/ppc: Implement ISA V3.00 radix page fault handler, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 15/23] target/ppc: Update tlbie to check privilege level based on GTSE, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 16/23] target/ppc: Change tlbie invalid fields for POWER9 support, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 07/23] target/ppc: do not reset reserve_addr in exec_enter, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 20/23] spapr: Don't accidentally advertise HTM support on POWER9, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 22/23] pnv: Fix build failures on some host platforms, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 23/23] target/ppc: Avoid printing wrong aliases in CPU help text,
David Gibson <=
- [Qemu-ppc] [PULL 11/23] Add QemuMacDrivers qemu_vga.ndrv revision d4e7d7a built as submodule, David Gibson, 2017/05/11
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/23] ppc-for-2.10 queue 20170511, Stefan Hajnoczi, 2017/05/15