[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model |
Date: |
Wed, 19 Jul 2017 14:01:50 +1000 |
User-agent: |
Mutt/1.8.3 (2017-05-23) |
On Wed, Jul 19, 2017 at 01:56:57PM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2017-07-19 at 13:08 +1000, David Gibson wrote:
> > On Wed, Jul 05, 2017 at 07:13:17PM +0200, Cédric Le Goater wrote:
> > > Let's provide an empty shell for the XIVE controller model with a
> > > couple of attributes for the IRQ number allocator. The latter is
> > > largely inspired by OPAL which allocates IPI IRQ numbers from the
> > > bottom of the IRQ number space and allocates the HW IRQ numbers from
> > > the top.
> > >
> > > The number of IPIs is simply deduced from the max number of CPUs the
> > > guest supports and we provision a arbitrary number of HW irqs.
> > >
> > > The XIVE object is kept private because it will hold internal tables
> > > which do not need to be exposed to sPAPR.
>
> It does have an MMIO presence though... more than one even. There's the
> TIMA (per-HW thread control area) and there's the per-interrupt MMIO
> space which are exposed to the guest. There's also the per-queue
> MMIO control area too.
Ok. Always? Or just on powernv?
If it only has an MMIO presence on powernv, then the "core" xive
object should probably be TYPE_DEVICE, with the powernv specific
device being a SysBusDevice which incorporates the core xive device
inside it.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
- Re: [Qemu-ppc] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9, (continued)
- Re: [Qemu-ppc] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9, Cédric Le Goater, 2017/07/10
- Re: [Qemu-ppc] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9, Benjamin Herrenschmidt, 2017/07/10
- Re: [Qemu-ppc] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9, Cédric Le Goater, 2017/07/11
- Re: [Qemu-ppc] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9, David Gibson, 2017/07/11
- Re: [Qemu-ppc] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9, Cédric Le Goater, 2017/07/11
- Re: [Qemu-ppc] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9, Benjamin Herrenschmidt, 2017/07/11
[Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, Cédric Le Goater, 2017/07/05
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, Benjamin Herrenschmidt, 2017/07/19
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, David Gibson, 2017/07/21
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, Benjamin Herrenschmidt, 2017/07/21
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, David Gibson, 2017/07/23
Re: [Qemu-ppc] [Qemu-devel] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, Alexey Kardashevskiy, 2017/07/23
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, Benjamin Herrenschmidt, 2017/07/24
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, David Gibson, 2017/07/24
Re: [Qemu-ppc] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model, Benjamin Herrenschmidt, 2017/07/24