[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-ppc] [PATCH for-3.1 0/7] target/ppc fp cleanups

From: Richard Henderson
Subject: [Qemu-ppc] [PATCH for-3.1 0/7] target/ppc fp cleanups
Date: Tue, 3 Jul 2018 08:17:25 -0700

Beginning with John Arbuckle's fdiv test case, clean up some
of the fp helpers.  As with fdiv, fre and fresqrt are missing
divide-by-zero exceptions.

I've also noticed that load/store were using arithmetic conversions
to/from float32.  These should be using the non-arithmetic algorithms
listed in the manual.

Aside from cleaning up all of the rest of the helpers, I believe that
the implementation of the single-precision operations are incorrect.
They are currently implemented with the double-precision operation
followed by a round-to-single.  This causes incorrect results via
double rounding.  I believe better results could be had by using
these non-arithmetic converters to produce float32 operands, use the
proper float32 softfloat operations, and then convert back.

Anyway, all of this has been broken long enough that it'll need to
wait til next devel cycle before anything further gets done.


Richard Henderson (7):
  target/ppc: Enable fp exceptions for user-only
  target/ppc: Honor fpscr_ze semantics and tidy fdiv
  target/ppc: Tidy helper_fmul
  target/ppc: Tidy helper_fadd, helper_fsub
  target/ppc: Tidy helper_fsqrt
  target/ppc: Honor fpscr_ze semantics and tidy fre, fresqrt
  target/ppc: Use non-arithmetic conversions for fp load/store

 target/ppc/helper.h                |  14 +-
 target/ppc/fpu_helper.c            | 294 +++++++++++++++++------------
 target/ppc/translate/fp-impl.inc.c |  26 +--
 target/ppc/translate_init.inc.c    |   2 +
 4 files changed, 189 insertions(+), 147 deletions(-)


reply via email to

[Prev in Thread] Current Thread [Next in Thread]