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Re: [Qemu-ppc] [PATCH v2 0/8] target/ppc: remove various endian hacks fr

From: David Gibson
Subject: Re: [Qemu-ppc] [PATCH v2 0/8] target/ppc: remove various endian hacks from int_helper.c
Date: Wed, 2 Jan 2019 13:59:04 +1100
User-agent: Mutt/1.10.1 (2018-07-13)

On Fri, Dec 28, 2018 at 01:52:27PM +0000, Mark Cave-Ayland wrote:
> >From working on the TCG vector operations patchset, it is apparent that there
> are a large number of endian-based hacks in int_helper.c which can be removed 
> by
> making use of the various Vsr* macros.
> Patch 1 is simple enough, and implements the complete set of Vsr* macros for
> both big endian and little endian hosts.
> Patches 2 and 3 rework the vector merge and multiply algorithms so that they
> no longer require the endian-dependent HI_IDX and LO_IDX macros.
> Patches 4 and 5 then completely remove the HI_IDX/LO_IDX and EL_IDX macros by
> replacing the element accesses with their equivalent Vsr* macro instead.
> Patches 6 and 7 tidy up the VEXT_SIGNED macro and fix a potential shift bug
> in the ROTRu32 and ROTRu64 macros pointed out by Richard during the review of
> v1.
> Finally patch 8 is an inspection-based removal of other HOST_WORDS_BIGENDIAN
> hacks in int_helper.c, again replacing accesses with the relevant Vsr* macro
> instead.
> Note that there are still some endian hacks left in int_helper.c after this
> patchset: in particular the delightfully evil VECTOR_FOR_INORDER_I macro still
> remains in places where the index variable was used for purposes other than
> accessing elements within the vector.
> There were also some parts where additional conversion could be done, but I
> wasn't confident enough to make the change without access to PPC64 test images
> or real big-endian host hardware.

Applied to ppc-for-4.0, thanks.

> Signed-off-by: Mark Cave-Ayland <address@hidden>
> Based-on: <address@hidden> "target/ppc: prepare for conversion to TCG vector 
> operations"
> v2:
> - Add R-B tags from Richard
> - Add patches 6 and 7 to simplify the VEXT_SIGNED macro and fix a potential
>   shift bug in the ROTRu32 and ROTRu64 macros
> - Don't require ordered access for VNEG and VGENERIC_DO macros as pointed out
>   by Richard
> Mark Cave-Ayland (8):
>   target/ppc: implement complete set of Vsr* macros
>   target/ppc: rework vmrg{l,h}{b,h,w} instructions to use Vsr* macros
>   target/ppc: rework vmul{e,o}{s,u}{b,h,w} instructions to use Vsr*
>     macros
>   target/ppc: eliminate use of HI_IDX and LO_IDX macros from
>     int_helper.c
>   target/ppc: eliminate use of EL_IDX macros from int_helper.c
>   target/ppc: simplify VEXT_SIGNED macro in int_helper.c
>   target/ppc: remove ROTRu32 and ROTRu64 macros from int_helper.c
>   target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in int_helper.c
>  target/ppc/int_helper.c | 521 
> ++++++++++++++++++++----------------------------
>  target/ppc/internal.h   |   9 +-
>  2 files changed, 223 insertions(+), 307 deletions(-)

David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!

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