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[Qemu-ppc] [PULL 41/43] target/ppc: Split out VSCR_SAT to a vector field
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 41/43] target/ppc: Split out VSCR_SAT to a vector field |
Date: |
Tue, 19 Feb 2019 01:30:47 +1100 |
From: Richard Henderson <address@hidden>
Change the representation of VSCR_SAT such that it is easy
to set from vector code.
Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/cpu.h | 4 +++-
target/ppc/int_helper.c | 11 ++++++++---
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 1c883fa836..325ebbeb98 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1052,10 +1052,12 @@ struct CPUPPCState {
/* Special purpose registers */
target_ulong spr[1024];
ppc_spr_t spr_cb[1024];
- /* Vector status and control register */
+ /* Vector status and control register, minus VSCR_SAT. */
uint32_t vscr;
/* VSX registers (including FP and AVR) */
ppc_vsr_t vsr[64] QEMU_ALIGNED(16);
+ /* Non-zero if and only if VSCR_SAT should be set. */
+ ppc_vsr_t vscr_sat QEMU_ALIGNED(16);
/* SPE registers */
uint64_t spe_acc;
uint32_t spe_fscr;
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 1d8a4b530b..6ad596a08b 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -459,18 +459,23 @@ void helper_lvsr(ppc_avr_t *r, target_ulong sh)
void helper_mtvscr(CPUPPCState *env, uint32_t vscr)
{
- env->vscr = vscr;
+ env->vscr = vscr & ~(1u << VSCR_SAT);
+ /* Which bit we set is completely arbitrary, but clear the rest. */
+ env->vscr_sat.u64[0] = vscr & (1u << VSCR_SAT);
+ env->vscr_sat.u64[1] = 0;
set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status);
}
uint32_t helper_mfvscr(CPUPPCState *env)
{
- return env->vscr;
+ uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0;
+ return env->vscr | (sat << VSCR_SAT);
}
static inline void set_vscr_sat(CPUPPCState *env)
{
- env->vscr |= 1 << VSCR_SAT;
+ /* The choice of non-zero value is arbitrary. */
+ env->vscr_sat.u32[0] = 1;
}
void helper_vaddcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
--
2.20.1
- [Qemu-ppc] [PULL 29/43] target/ppc: convert vspltis[bhw] to use vector operations, (continued)
- [Qemu-ppc] [PULL 29/43] target/ppc: convert vspltis[bhw] to use vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 36/43] target/ppc: Use helper_mtvscr for reset and gdb, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 28/43] target/ppc: convert vaddu[b, h, w, d] and vsubu[b, h, w, d] over to use vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 26/43] xics: Drop the KVM ICS class, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 24/43] xics: Handle KVM interrupt presentation from "simple" ICS code, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 33/43] target/ppc: convert xxspltw to vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 39/43] target/ppc: Use mtvscr/mfvscr for vmstate, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 30/43] target/ppc: convert vsplt[bhw] to use vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 32/43] target/ppc: convert xxspltib to vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 37/43] target/ppc: Remove vscr_nj and vscr_sat, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 41/43] target/ppc: Split out VSCR_SAT to a vector field,
David Gibson <=
- [Qemu-ppc] [PULL 40/43] target/ppc: Add set_vscr_sat, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 43/43] target/ppc: convert vmin* and vmax* to vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 35/43] target/ppc: Pass integer to helper_mtvscr, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 38/43] target/ppc: Add helper_mfvscr, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 34/43] target/ppc: convert xxsel to vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 42/43] target/ppc: convert vadd*s and vsub*s to vector operations, David Gibson, 2019/02/18
- Re: [Qemu-ppc] [PULL 00/43] ppc-for-4.0 queue 20190219, Peter Maydell, 2019/02/19