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[Qemu-ppc] PPC hardfloat (was: Re: [Qemu-devel] [Bug 1841442] Re: floati

From: BALATON Zoltan
Subject: [Qemu-ppc] PPC hardfloat (was: Re: [Qemu-devel] [Bug 1841442] Re: floating point emulation can fail to set FE_INEXACT)
Date: Mon, 26 Aug 2019 22:28:33 +0200 (CEST)
User-agent: Alpine 2.21.9999 (BSF 287 2018-06-16)

On Mon, 26 Aug 2019, Richard Henderson wrote:
That said, qemu-system-ppc64 will *never* use hardfloat, because ppc always
need the current and correct result of inexact for emulation of the FI bit,
which requires that we use the softfloat path.

That's bad news. I hoped that hardfloat for PPC can be implemented and previously it was thought it could be done after some reorganisation to prevent always reseting flags by moving them to environment or somewhere else (but I don't remember the details and maybe I never fully understood it in the first place). Could you please explain why do you think it's not possible? I don't know much about IEEE floating point but couldn't the flag be set based on exceptions we get? If the operations did not generate inexact eception the why should we set the flag and why is it not enough to set it when exception is caught to emulate it? (After the above reorg of course to preserve flags between FP ops.)

Currently using softfloat is a big source of slowness in PPC emulation that hopefully could be improved by using hardfloat where possible.


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