Re: [PATCH v4 19/25] ppc/pnv: Introduce a pnv_xive_block_id() helper

[David Gibson]

On Wed, Sep 18, 2019 at 06:06:39PM +0200, Cédric Le Goater wrote:
> When PC_TCTXT_CHIPID_OVERRIDE is configured, the PC_TCTXT_CHIPID field
> overrides the hardwired chip ID in the Powerbus operations and for CAM
> compares. This is typically used in the one block-per-chip configuration
> to associate a unique block id number to each IC of the system.
> 
> Simplify the model with a pnv_xive_block_id() helper and remove
> 'tctx_chipid' which becomes useless.
> 
> The model does support multiple blocks per chip.
> 
> Signed-off-by: Cédric Le Goater <address@hidden>

Reviewed-by: David Gibson <address@hidden>

> ---
>  include/hw/ppc/pnv_xive.h |  3 --
>  hw/intc/pnv_xive.c        | 68 ++++++++++++++++++++-------------------
>  2 files changed, 35 insertions(+), 36 deletions(-)
> 
> diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h
> index 4fdaa9247d65..f4c7caad40ee 100644
> --- a/include/hw/ppc/pnv_xive.h
> +++ b/include/hw/ppc/pnv_xive.h
> @@ -72,9 +72,6 @@ typedef struct PnvXive {
>      /* Interrupt controller registers */
>      uint64_t      regs[0x300];
>  
> -    /* Can be configured by FW */
> -    uint32_t      tctx_chipid;
> -
>      /*
>       * Virtual Structure Descriptor tables : EAT, SBE, ENDT, NVTT, IRQ
>       * These are in a SRAM protected by ECC.
> diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
> index a986d4ed9364..8c352315f6f5 100644
> --- a/hw/intc/pnv_xive.c
> +++ b/hw/intc/pnv_xive.c
> @@ -85,13 +85,30 @@ static inline uint64_t SETFIELD(uint64_t mask, uint64_t 
> word,
>      return (word & ~mask) | ((value << ctz64(mask)) & mask);
>  }
>  
> +/*
> + * When PC_TCTXT_CHIPID_OVERRIDE is configured, the PC_TCTXT_CHIPID
> + * field overrides the hardwired chip ID in the Powerbus operations
> + * and for CAM compares
> + */
> +static uint8_t pnv_xive_block_id(PnvXive *xive)
> +{
> +    uint8_t blk = xive->chip->chip_id;
> +    uint64_t cfg_val = xive->regs[PC_TCTXT_CFG >> 3];
> +
> +    if (cfg_val & PC_TCTXT_CHIPID_OVERRIDE) {
> +        blk = GETFIELD(PC_TCTXT_CHIPID, cfg_val);
> +    }
> +
> +    return blk;
> +}
> +
>  /*
>   * Remote access to controllers. HW uses MMIOs. For now, a simple scan
>   * of the chips is good enough.
>   *
>   * TODO: Block scope support
>   */
> -static PnvXive *pnv_xive_get_ic(uint8_t blk)
> +static PnvXive *pnv_xive_get_remote(uint8_t blk)
>  {
>      PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine());
>      int i;
> @@ -100,7 +117,7 @@ static PnvXive *pnv_xive_get_ic(uint8_t blk)
>          Pnv9Chip *chip9 = PNV9_CHIP(pnv->chips[i]);
>          PnvXive *xive = &chip9->xive;
>  
> -        if (xive->chip->chip_id == blk) {
> +        if (pnv_xive_block_id(xive) == blk) {
>              return xive;
>          }
>      }
> @@ -212,7 +229,7 @@ static uint64_t pnv_xive_vst_addr(PnvXive *xive, uint32_t 
> type, uint8_t blk,
>  
>      /* Remote VST access */
>      if (GETFIELD(VSD_MODE, vsd) == VSD_MODE_FORWARD) {
> -        xive = pnv_xive_get_ic(blk);
> +        xive = pnv_xive_get_remote(blk);
>  
>          return xive ? pnv_xive_vst_addr(xive, type, blk, idx) : 0;
>      }
> @@ -360,7 +377,10 @@ static int pnv_xive_get_eas(XiveRouter *xrtr, uint8_t 
> blk, uint32_t idx,
>  {
>      PnvXive *xive = PNV_XIVE(xrtr);
>  
> -    if (pnv_xive_get_ic(blk) != xive) {
> +    /*
> +     * EAT lookups should be local to the IC
> +     */
> +    if (pnv_xive_block_id(xive) != blk) {
>          xive_error(xive, "VST: EAS %x is remote !?", XIVE_SRCNO(blk, idx));
>          return -1;
>      }
> @@ -471,7 +491,7 @@ static PnvXive *pnv_xive_tm_get_xive(PowerPCCPU *cpu)
>  static void pnv_xive_notify(XiveNotifier *xn, uint32_t srcno)
>  {
>      PnvXive *xive = PNV_XIVE(xn);
> -    uint8_t blk = xive->chip->chip_id;
> +    uint8_t blk = pnv_xive_block_id(xive);
>  
>      xive_router_notify(xn, XIVE_SRCNO(blk, srcno));
>  }
> @@ -835,20 +855,7 @@ static void pnv_xive_ic_reg_write(void *opaque, hwaddr 
> offset,
>      case PC_TCTXT_CFG:
>          /*
>           * TODO: block group support
> -         *
> -         * PC_TCTXT_CFG_BLKGRP_EN
> -         * PC_TCTXT_CFG_HARD_CHIPID_BLK :
> -         *   Moves the chipid into block field for hardwired CAM compares.
> -         *   Block offset value is adjusted to 0b0..01 & ThrdId
> -         *
> -         *   Will require changes in xive_presenter_tctx_match(). I am
> -         *   not sure how to handle that yet.
>           */
> -
> -        /* Overrides hardwired chip ID with the chip ID field */
> -        if (val & PC_TCTXT_CHIPID_OVERRIDE) {
> -            xive->tctx_chipid = GETFIELD(PC_TCTXT_CHIPID, val);
> -        }
>          break;
>      case PC_TCTXT_TRACK:
>          /*
> @@ -1665,7 +1672,8 @@ static void xive_nvt_pic_print_info(XiveNVT *nvt, 
> uint32_t nvt_idx,
>  void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon)
>  {
>      XiveRouter *xrtr = XIVE_ROUTER(xive);
> -    uint8_t blk = xive->chip->chip_id;
> +    uint8_t blk = pnv_xive_block_id(xive);
> +    uint8_t chip_id = xive->chip->chip_id;
>      uint32_t srcno0 = XIVE_SRCNO(blk, 0);
>      uint32_t nr_ipis = pnv_xive_nr_ipis(xive, blk);
>      XiveEAS eas;
> @@ -1673,12 +1681,12 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor 
> *mon)
>      XiveNVT nvt;
>      int i;
>  
> -    monitor_printf(mon, "XIVE[%x] Source %08x .. %08x\n", blk, srcno0,
> -                   srcno0 + nr_ipis - 1);
> +    monitor_printf(mon, "XIVE[%x] #%d Source %08x .. %08x\n", chip_id, blk,
> +                   srcno0, srcno0 + nr_ipis - 1);
>      xive_source_pic_print_info(&xive->ipi_source, srcno0, mon);
>  
> -    monitor_printf(mon, "XIVE[%x] EAT %08x .. %08x\n", blk, srcno0,
> -                   srcno0 + nr_ipis - 1);
> +    monitor_printf(mon, "XIVE[%x] #%d EAT %08x .. %08x\n", chip_id, blk,
> +                   srcno0, srcno0 + nr_ipis - 1);
>      for (i = 0; i < nr_ipis; i++) {
>          if (xive_router_get_eas(xrtr, blk, i, &eas)) {
>              break;
> @@ -1688,20 +1696,20 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor 
> *mon)
>          }
>      }
>  
> -    monitor_printf(mon, "XIVE[%x] ENDT\n", blk);
> +    monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk);
>      i = 0;
>      while (!xive_router_get_end(xrtr, blk, i, &end)) {
>          xive_end_pic_print_info(&end, i++, mon);
>      }
>  
> -    monitor_printf(mon, "XIVE[%x] END Escalation EAT\n", blk);
> +    monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk);
>      i = 0;
>      while (!xive_router_get_end(xrtr, blk, i, &end)) {
>          xive_end_eas_pic_print_info(&end, i++, mon);
>      }
>  
> -    monitor_printf(mon, "XIVE[%x] NVTT %08x .. %08x\n", blk, 0,
> -                   XIVE_NVT_COUNT - 1);
> +    monitor_printf(mon, "XIVE[%x] #%d NVTT %08x .. %08x\n", chip_id, blk,
> +                   0, XIVE_NVT_COUNT - 1);
>      for (i = 0; i < XIVE_NVT_COUNT; i += XIVE_NVT_PER_PAGE) {
>          while (!xive_router_get_nvt(xrtr, blk, i, &nvt)) {
>              xive_nvt_pic_print_info(&nvt, i++, mon);
> @@ -1715,12 +1723,6 @@ static void pnv_xive_reset(void *dev)
>      XiveSource *xsrc = &xive->ipi_source;
>      XiveENDSource *end_xsrc = &xive->end_source;
>  
> -    /*
> -     * Use the PnvChip id to identify the XIVE interrupt controller.
> -     * It can be overriden by configuration at runtime.
> -     */
> -    xive->tctx_chipid = xive->chip->chip_id;
> -
>      /* Default page size (Should be changed at runtime to 64k) */
>      xive->ic_shift = xive->vc_shift = xive->pc_shift = 12;
>  

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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