[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: About hardfloat in ppc

From: BALATON Zoltan
Subject: Re: About hardfloat in ppc
Date: Mon, 27 Apr 2020 12:34:28 +0200 (CEST)
User-agent: Alpine 2.22 (BSF 395 2020-01-19)

On Mon, 27 Apr 2020, Alex Bennée wrote:
罗勇刚(Yonggang Luo) <address@hidden> writes:
Because ppc fpu-helper are always clearing float_flag_inexact,
So is that possible to optimize the performance when  float_flag_inexact
are cleared?

There was some discussion about this in the last thread about enabling
hardfloat for PPC. See the thread:

 Subject: [RFC PATCH v2] target/ppc: Enable hardfloat for PPC
 Date: Tue, 18 Feb 2020 18:10:16 +0100
 Message-Id: <address@hidden>

I've answered this already with link to that thread here:

On Fri, 10 Apr 2020, BALATON Zoltan wrote:
: Date: Fri, 10 Apr 2020 20:04:53 +0200 (CEST)
: From: BALATON Zoltan <address@hidden>
: To: "罗勇刚(Yonggang Luo)" <address@hidden>
: Cc: address@hidden, Mark Cave-Ayland, John Arbuckle, address@hidden, Paul 
Clarke, Howard Spoelstra, David Gibson
: Subject: Re: [RFC PATCH v2] target/ppc: Enable hardfloat for PPC
: On Fri, 10 Apr 2020, 罗勇刚(Yonggang Luo) wrote:
:> Are this stable now? I'd like to see hard float to be landed:)
: If you want to see hardfloat for PPC then you should read the replies to : this patch which can be found here:
: http://patchwork.ozlabs.org/patch/1240235/
: to understand what's needed then try to implement the solution with FP : exceptions cached in a global that maybe could work. I won't be able to : do that as said here:
: https://lists.nongnu.org/archive/html/qemu-ppc/2020-03/msg00006.html
: because I don't have time to learn all the details needed. I think : others are in the same situation so unless somebody puts in the : necessary effort this won't change.

Which also had a proposed solution to the problem that you could try to implement, in particular see this message:


amd Richard's reply immediately below that. In short to optimise FPU emulation we would either find a way to compute inexact flag quickly without reading the FPU status (this may not be possible) or somehow get status from the FPU but the obvious way of claring the flag and reading them after each operation is too slow. So maybe using exceptions and only clearing when actually there's a change could be faster.

As to how to use exceptions see this message in above thread:


But that's only to show how to hook in an exception handler what it does needs to be implemented. Then tested and benchmarked.

I still don't know where are the extensive PPC floating point tests to use for checking results though as that was never answered.

However in short the problem is if the float_flag_inexact is clear you
must use softfloat so you can properly calculate the inexact status. We
can't take advantage of the inexact stickiness without loosing the
fidelity of the calculation.

I still don't get why can't we use hardware via exception handler to detect flags for us and why do we only use hardfloat in some corner cases. If reading the status is too costly then we could mirror it in a global which is set by an FP exception handler. Shouldn't that be faster? Is there a reason that can't work?


reply via email to

[Prev in Thread] Current Thread [Next in Thread]