qemu-ppc
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH v5 0/6] Add several Power ISA 3.1 32/64-bit vector instructions


From: Lijun Pan
Subject: [PATCH v5 0/6] Add several Power ISA 3.1 32/64-bit vector instructions
Date: Thu, 23 Jul 2020 23:58:39 -0500

This patch series add several newly introduced 32/64-bit vector
instructions in Power ISA 3.1. Power ISA 3.1 flag is introduced in
this version. In v4 version, coding style issues are fixed, community
reviews/suggestions are taken into consideration. 1/11 - 5/11 of v4 were
accepted by David Gibson, and 9/11 of v4 was accepted by Lauren Vivier.
This v5 version updates PPC_FEATURE2_ARCH_3_10 definition in 6/11 of v4,
rebases 7/11 8/11 10/11 11/11 of v4, and integrates vmsumudm/vmsumcud
patch.

Lijun Pan (6):
  Update PowerPC AT_HWCAP2 definition
  target/ppc: add vmulld to INDEX_op_mul_vec case
  target/ppc: add vmulh{su}w instructions
  target/ppc: add vmulh{su}d instructions
  target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions
  target/ppc: add vmsumudm vmsumcud instructions

 disas/ppc.c                         |   2 +
 include/elf.h                       |   1 +
 target/ppc/helper.h                 |  16 +++-
 target/ppc/int_helper.c             | 111 +++++++++++++++++++++++++++-
 target/ppc/translate.c              |   4 +-
 target/ppc/translate/vmx-impl.inc.c |  62 +++++++++++-----
 target/ppc/translate/vmx-ops.inc.c  |  25 ++++++-
 tcg/ppc/tcg-target.h                |   2 +
 tcg/ppc/tcg-target.inc.c            |  12 ++-
 9 files changed, 208 insertions(+), 27 deletions(-)

-- 
2.23.0




reply via email to

[Prev in Thread] Current Thread [Next in Thread]