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Re: [RFC 10/10] hw/mos6522: Synchronize timer interrupt and timer counte
From: |
Finn Thain |
Subject: |
Re: [RFC 10/10] hw/mos6522: Synchronize timer interrupt and timer counter |
Date: |
Thu, 26 Aug 2021 16:43:27 +1000 (AEST) |
On Wed, 25 Aug 2021, Mark Cave-Ayland wrote:
>
> Unfortunately the datasheet I was using for reference doesn't appear to
> have the relevant detail here. Have you got a reference to the datasheet
> you're using which shows what happens to the timers at the zero crossing
> point?
>
The datasheets which I normally refer to (Rockwell and Synertek) agree
about this. Also, I established the sequence experimentally when I was
writing the clocksource drivers for Linux/m68k.
- [RFC 05/10] hw/mos6522: Don't clear T1 interrupt flag on latch write, (continued)
- [RFC 05/10] hw/mos6522: Don't clear T1 interrupt flag on latch write, Finn Thain, 2021/08/24
- [RFC 07/10] hw/mos6522: Fix initial timer counter reload, Finn Thain, 2021/08/24
- [RFC 03/10] hw/mos6522: Remove redundant mos6522_timer1_update() calls, Finn Thain, 2021/08/24
- [RFC 10/10] hw/mos6522: Synchronize timer interrupt and timer counter, Finn Thain, 2021/08/24
- [RFC 02/10] hw/mos6522: Remove get_counter_value() methods and functions, Finn Thain, 2021/08/24
- [RFC 06/10] hw/mos6522: Implement oneshot mode, Finn Thain, 2021/08/24
- [RFC 09/10] hw/mos6522: Avoid using discrepant QEMU clock values, Finn Thain, 2021/08/24