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Re: [PATCH v3 0/2] target/ppc: Fix vector registers access in gdbstub fo


From: David Gibson
Subject: Re: [PATCH v3 0/2] target/ppc: Fix vector registers access in gdbstub for little-endian
Date: Fri, 27 Aug 2021 12:43:37 +1000

On Thu, Aug 26, 2021 at 11:56:54AM -0300, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
> 
> PPC gdbstub code has two possible swaps of the 64-bit elements of AVR
> registers: in gdb_get_avr_reg/gdb_set_avr_reg (based on msr_le) and in
> gdb_get_reg128/ldq_p (based on TARGET_WORDS_BIGENDIAN).
> 
> In softmmu, only the first is done, because TARGET_WORDS_BIGENDIAN is
> always true. In user mode, both are being done, resulting in swapped
> high and low doublewords of AVR registers in little-endian binaries.
> 
> We fix this by moving the first swap to ppc_maybe_bswap_register, which
> already handles the endianness swap of each element's value in softmmu
> and does nothing in user mode.

Applied to ppc-for-6.2, thanks.

> 
> Based-on: <20210826141446.2488609-1-matheus.ferst@eldorado.org.br>
> 
> Matheus Ferst (2):
>   include/qemu/int128.h: introduce bswap128s
>   target/ppc: fix vector registers access in gdbstub for little-endian
> 
>  include/qemu/int128.h | 17 ++++++++++++++++-
>  target/ppc/gdbstub.c  | 32 +++++++-------------------------
>  2 files changed, 23 insertions(+), 26 deletions(-)
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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